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4-channel, 1.5 msps, 12-bit and 10-bit parallel adcs with a sequencer prelim inary technical data ad7933/AD7934 fea t ures fast throughput rate: 1.5 ms ps specified for v dd of 2.7 v to 5. 25 v low power 8 mw max at 1. 5 msps with 3 v supplies 16 mw max at 1.5 msps with 5 v s u pplies 4 analog input channels with a sequencer software configurable analog inputs 4-channel singl e-ende d inputs 2-channel fu lly differentia l inp u ts 2-channel pseu do-differenti a l inputs accurate on-chip 2.5 v referen c e wide input bandwidth 70 db s n r at 5 0 kh z input fr e q uency n o pipeline delays high speed par a llel interface word/byte modes full sh utdown mode: 1 a m a x 28 lea d tssop package func ti on a l bl ock di a g r a m 03713-0-001 v in 3 t/h parallel interface/control register sequencer 12-/10-bit sar adc and control i/p mux 2.5v vref db0 db11 v drive v dd ad7933/AD7934 v in 0 agnd v refin/ v refout clkin busy convst cs dgnd rd wr w/b fi g u r e 1 . gener a l description the ad7933/AD7934 a r e 12-b i t a nd 10-b i t, hig h s p e e d , lo w p o w e r , successi v e a p p r o x im a t ion (sar) ad cs. the p a r t s o p era t e f r o m a s i n g le 2.7 v t o 5. 25 v p o w e r s u p p l y a n d f e a t ur e thr o ug h p u t ra t e s t o 1.5 ms ps. th e p a r t s con t a i n a lo w n o is e , wid e b a n d wi d t h , dif f er en t i a l t r a c k-and- h o ld am plif ier t h a t can ha nd le in p u t f r e q uen c ies u p t o 20 mh z. the ad7933/AD7934 f e a t ur e 4 a n alog in p u t c h a nne ls wi t h a c h a n n e l s e q u en ce r t o all o w a co n s ecu t i v e seq u en ce o f c h a n n e l s t o b e con v er t e d o n . th es e p a r t s ca n accep t e i t h e r sin g le-e n d e d , f u l l y dif f er en t i al, o r ps eudo-dif fer e n t ia l a n alog i n p u ts. the con v ersio n p r o c es s an d da t a acq u isi t ion a r e co n t r o l l e d usin g st anda r d co n t r o l in pu ts, w h ich a l lo ws fo r e a sy in t e r f acing to m i c r opro c e ss or s and d s p s . t h e i n put s i g n a l i s s a m p l e d on th e fal l in g edge o f co n v s t a n d t h e con v ersio n is a l s o ini t ia t e d a t t h is p o in t. the ad7933/AD7934 has an acc u ra t e on-c hi p 2.5 v r e f e r e n c e th a t ca n be use d a s th e r e f e r e n c e so ur ce f o r th e a n alog- t o- d i g i tal co n v ersio n . a l t e r n a t i v e l y , t h is p i n can b e o v er dr i v en t o p r o v ide an e x te r n a l re f e re nc e. th e s e p a r t s us e ad van c e d desig n t e chniq u es t o achie ve v e r y lo w p o w e r d i s s i p at i o n at h i g h t h r o u g hp u t r a t e s . t h e y a l s o f e at u r e f l e x ibl e p o we r m a n a ge me n t opt i ons . a n o n - c h i p c o n t ro l re g i ste r al lo ws t h e us er t o s e t u p dif f er en t o p era t i n g condi t i on s, in cl u d in g ana l og in p u t ra n g e and co nf igura t ion, o u t p u t co d i ng, p o w e r ma na ge m e n t , and cha n n e l s e q u e n ci n g . produc t highlight s 1. h i g h t h r o ug h p u t w i t h lo w p o wer co n s um p t io n . 2. f o u r an a l o g i n put s w i t h a ch an ne l s e qu e n c e r . 3. a c c u ra t e on-c hi p 2.5 v r e f e r e n c e . 4. s o f t w a re c o n f i g u r abl e an a l o g i n put s . si ng l e - e nd e d , p s e u d o - dif f er en t i a l , o r f u l l y dif f er en t i al a n alog in p u t s t h a t a r e s o f t wa r e s e le c t ab le . 5. sing l e -s u p ply op er a t ion wi t h v dr iv e fu n c ti o n . th e v dr iv e f u nc t i on a l l o w s t h e p a r a l l el i n te r f a c e to c o nne c t di re c t ly to 3 v , o r 5 v p r o c es s o r sys t em s indep e n d en t o f v dd . 6. no p i p e l i n e d e l a y . 7. a c c u ra t e con t r o l o f t h e s a m p ling in st an t v i a a co n v s t i n put a n d o n c e of f c o n v e r s i on c o n t ro l. pr g in fo rmation furn ished by an alog d e v i c e s is believed to be accurate and reliable. how e ver, n o resp on sibili ty is assume d b y a n alog de vices fo r its use, nor for an y i n fri n geme nt s of p a t e nt s or ot h e r ri ght s o f th ird parties th at may result fro m its use . s p ecificatio n s subj ec t to ch an g e witho u t n o tice. no licen s e is g r an te d by implicati o n or ot herwi s e u n der a n y p a t e nt or p a t e nt ri ghts of analog de v i ces. trademarks an d registered tra d ema r ks are the prop erty o f their respective ow ners. one technolog y way, p.o . box 9106, norwood, ma 02062-9106, u.s.a. t e l: 781. 329. 4 700 www.analog.com fax: 781. 326. 87 03 ? 2004 analog de vices, i n c. al l r i ght s r e ser v ed . rev.
ad7933/AD7934 prelim inary technical data table of contents ad7933s eci ica t i n s .................................................................. 3 AD7934?s p ecif ica t io n s .................................................................. 5 t i min g s p e c if ic a t io n s ....................................................................... 7 a b s o l u t e m a xim u m r a t i n g s ............................................................ 8 es d c a u t ion .................................................................................. 8 p i n c o nf igura t io n an d f u n c t i on d e s c r i p t ion s ............................. 9 t e r m in olog y .................................................................................... 11 t y p i cal p e r f o r ma n c e c h a r ac t e r i s t ics ........................................... 13 c o n t r o l reg i st e r .......................................................................... 16 s e q u e n cer o p er a t io n ................................................................. 17 cir c ui t i n fo r m a t io n ........................................................................ 18 c o n v er t e r o p er a t io n .................................................................. 18 ad c t r a n sfer f u n c t i on ............................................................. 18 t y p i cal c o nn e c t i o n d i a g ram ................................................... 19 analog i n p u t s t r u c t ur e .............................................................. 19 analog i n p u ts .............................................................................. 20 analog i n p u t s e le c t io n .............................................................. 22 refer e nce s e c t io n ....................................................................... 22 p a ral l e l i n t e r f ac e ......................................................................... 24 p o w e r m o des o f o p era t io n ....................................................... 27 p o w e r vs. thr o ug h p u t r a te ....................................................... 28 micr o p r o ces s o r i n t e r f acing ....................................................... 28 a p plica t ion h i n t s . .......................................................................... 30 g r o u n d in g an d l a yo u t .............................................................. 30 e v al ua t i n g t h e ad7933/ad79 34 p e r f o r ma n c e . ..................... 30 o u t l in e dim e n s io n s ....................................................................... 31 or der i n g g u ide . ......................................................................... 31 revisi on h i s t or y 8/04?r e visio n prg: pr e l imina r y v e rsio n rev. pr g | page 2 of 32
prelim inary technical data ad7933/AD7934 ad7933?specifications v dd = v dr i v e =2 .7 v t o 5.25 v , i n t e r n al/e xt er na l v ref = 2.5 v , u n les s o t h e r w is e n o ted , f clkin = 24 mh z, f sam p l e = 1.5 ms ps; t a = t min to t max , u n l e ss ot he r w i s e note d. table 1. p a r a m e t e r b version 1 nit test condition s comments dnamic p e rf ormance f in 50 kh sine wave signal-to-nois e + distortion (sinad) 2 60 db min signal-to-noise ratio (snr ) 2 60 db min t o tal harmonic distortion (t hd) 2 73 db max peak harmonic or spurious noise (sfdr) 2 73 db max intermodulation distortion (imd) 2 fa 40.1 kh fb 51.5 kh second-order terms 75 db typ third-order ter m s 75 db typ channe l-to-cha nnel iso l ation 75 db typ aperture delay 2 5 ns typ aperture i tter 2 50 ps typ full power ba nd wid t h 2 3 20 mh typ 3 db 2.5 mh typ 0.1 db dc accrac resolution 10 bits integral nonlinearity 2 0.5 sb max differential non l inearity 2 0.5 sb max guaranteed no missed cod e s to 10 bits total nadjusted error tbd sb max single-ended and pseudo differ e ntial inp ut straight binary output coding offset error 2 4.5 sb max offset error match 2 0.5 sb max gain error 2 2 sb max gain error match 2 0.6 sb max fully differential input t w os complement output codi ng offset positive gain error 2 2 sb max positive gain error match 2 0.6 sb max zero-code error 2 3 sb max zero-code error match 2 1 sb max negative gain error 2 2 sb max negative gain error match 2 0.6 sb max anaog in pt single-ended input range 0 to v ref or 0 to 2 v ref v depending on range bit settin g pseudo-differential input range v in + 0 to v ref or 2 v ref v depending on range bit settin g v in 0.1 to +0.4 v fully differential input range v in + and v in v cm v ref 2 v v cm common- mode voltage 4 v ref 2 v in+ and v in v cm v ref v v cm v ref v in + or v in must rema in within gndv dd dc eakage current 5 1 a max input capacitance 45 pf typ hen in track 10 pf typ hen in hold referenc e in p totpt v ref input volta g e 6 2.5 v 1 specified performance dc eakage current 5 1 a max v ref input impe dance 10 k v ref o t output voltage 2.5 v 0.1 25c v ref o t temperature coefficient 15 ppm c typ v ref noise 10 v typ 0.1 h to 10 h bandwidth 130 v typ 0.1 h to 1 mh bandwidth rev. pr g page 3 of 32
ad7933/AD7934 prelim inary technical data p a r a m e t e r b ersin 1 unit test cnditin s /cmments ref outut imedance 10 ty ref inut caacitance 15 f ty hen in trac 25 f ty hen in hld logic inputs inut hih lt ae, inh 2.4 min inut lw ltae, inl 0 . m a inut current, i in 1 a ma t y ically 10 na, in 0 r drie inut caacitance, c in 5 10 f ma logic outputs outut hih l t ae, oh 2.4 min i sou r ce 200 a outut lw ltae, ol 0.4 ma i sin 200 a flatin-state leaae current 10 a ma flatin-state outut caacitance 5 10 f ma outut cdin coding it 0 straiht natural binary tws cmlem e nt coding it 1 conersion r a te cnersi n tim e t 2 13 tcl t 20 ns trac-and-hld acquisitin tim e 135 ns ma full scale ste inut thruhut rat e 1.5 msps ma poer reuir emen ts dd 2.7/5.25 min/ma drie 2.7 /5.25 min/ma i dd 7 diital i/ps 0 r drie nrmal mdestatic 0.5 ma ty dd 2.7 t 5. 25 , scl n r nrmal mde oeratinal 3.2 ma ma dd 4.75 t 5 . 25 2. ma ma dd 2.7 t 3. aut standby m de 1.55 ma ty f sample 250 sps 90 a ma static aut shut dwn mde 1 ma ty f sample 250 sps 1 a ma static full shutdwn mde 1 a ma scl n r pwer dissi ati n nrmal mde oeratinal 1 m ma dd 5 m ma dd 3 aut standy mde static 450 ma dd 5 270 ma dd 3 aut shut dw n mde sta tic 5 ma dd 5 3 ma dd 3 full shutdwn mde 5 ma dd 5 3 ma dd 3 1 tem era t ure ra n e i s a s ll ws b e rsi n s 40 c t 5c. 2 se e te rmin ly s e ct in . 3 an a l i n ut s wi t h s l ew ra t e s ece edi n 27 /s ul l- sca l e i n ut si n e wa e 3 .5 mh wi t h i n t h e a c q u i s i t i n t i m e m a y ca use a n i n crre ct cn ersi n r e su lt t e re turne d y the cne r te r. 4 fr u ll cm m n - m de ra n e see 5 saml e tes t ed d uri n initial rel e ase t ens ure cml iance. this deice is eratinal with an e tern a l re er e n c e i n t h e ra n e 0.1 t 3. 5 di eren t i a l m de a n d 0.1 t dd i n seud - d i eren t i a l a n d si n l e - e n d e d m de s. 7 mea s ure d wi t h a m i dsca l e dc i n ut . re. pr g pae 4 32
prelim inary technical data ad7933/AD7934 AD7934?specifications v dd = v dr i v e = 2.7 v t o 5.25 v , i n t e r n al/e xter nal v ref = 2.5 v , unles s o t h e r w is e n o t e d , f clkin = 24 mh z, f sam p l e = 1.5 ms ps; t a = t min to t max , u n l e ss ot he r w i s e note d. table 2. parameter b version 1 nit test condition s comments dnamic p e rf ormance f in 50 kh sine wave signal-to-nois e + distortion (sinad) 2 70 db min signal-to-noise ratio (snr ) 2 70 db min t o tal harmonic distortion (t hd) 2 75 db max 80 db typ peak harmonic or spurious noise (sfdr) 2 75 db max 82 db typ intermodulation distortion (imd) 2 fa 40.1 kh fb 51.5 kh second-order terms 85 db typ third-order ter m s 85 db typ channe l-to-cha nnel iso l ation 85 db typ aperture delay 2 5 ns typ aperture i tter 2 50 ps typ full power ba nd wid t h 2 3 20 mh typ 3 db 2.5 mh typ 0.1 db dc accrac resolution 12 bits integral nonlinearity 2 1 sb max differential non l inearity 2 0.95 sb max guaranteed no missed cod e s to 12 bits total nadjusted error tbd sb max single-ended and pseudo-differ e ntial inp ut straight binary output coding offset error 2 4.5 sb max offset error match 2 0.5 sb max gain error 2 2 sb max gain error match 2 0.6 sb max fully differential input t w os complement output codi ng positive gain error 2 2 sb max positive gain error match 2 0.6 sb max zero-code error 2 3 sb max zero-code error match 2 1 sb max negative gain error 2 2 sb max negative gain error match 2 0.6 sb max anaog in pt single-ended input range 0 to v ref or 0 to 2 v ref v depending on range bit settin g pseudo-differential input range v in + 0 to v ref or 2 v ref v depending on range bit settin g v in 0.1 to +0.4 v fully differential input range v in + and v in v cm v ref 2 v v cm common- mode voltage 4 v ref 2 v in+ and v in v cm v ref v v cm v ref v in + or v in must rema in within gndv dd dc eakage current 5 1 a max input capacitance 45 pf typ hen in track 10 pf typ hen in hold referenc e in p totpt v ref input volta g e 6 2.5 v 1 specified performance dc eakage current 1 a max v ref input impe dance 10 k typ v ref o t output voltage 2.5 v 0.1 25c v ref o t temperature coefficient 15 ppm c typ v ref noise 10 v typ 0.1 h to 10 h bandwidth 130 v typ 0.1 h to 1 mh bandwidth rev. pr g page 5 of 32
ad7933/AD7934 prelim inary technical data parameter b ersin 1 unit test cnditin s /cmments ref outut imedance 10 ty ref inut caacitance 15 f ty hen in trac-and-hld 25 f ty hen in trac-and-hld logic inputs inut hih lt ae, inh 2.4 min inut lw ltae, inl 0 . m a inut current, i in 1 a ma t y ically 10 na, in 0 r drie inut caacitance, c in 5 1 0 f m a logic outputs outut hih l t ae, oh 2.4 min i sou r ce 200 a outut lw ltae, ol 0.4 ma i sin 200 a flatin-state leaae current 10 a ma flatin-state outut caacitance 5 10 f ma outut cdin coding it 0 straiht natural binary tws cmlem e nt coding it 1 conersion r a te cnersi n tim e t 2 13 tcl t 20 n s trac-and-hld acquisitin tim e 135 ns ma full scale ste inut thruhut rat e 1.5 msps ma poer reuir emen ts dd 2.7/5.25 min/ma drie 2.7 /5.25 min/ma i dd 7 diital i/ps 0 r drie nrmal mdestatic 0.5 ma ty dd 2.7 t 5. 25 , scl n r nrmal mde oeratinal 3.2 ma ma dd 4.75 t 5 . 25 2. ma ma dd 2.7 t 3. aut standby m de 1.55 ma ty f sample 250 sps 90 a ma static aut shut dwn mde 1 ma ty f sample 250 sps 1 a ma static full shutdwn mde 1 a ma scl n r pwer dissi ati n nrmal mde oeratinal 1 m ma dd 5 m ma dd 3 aut standy mde static 450 ma dd 5 270 ma dd 3 aut shut dw n mde sta tic 5 ma dd 5 3 ma dd 3 full shutdwn mde 5 ma dd 5 3 ma dd 3 1 tem era t ure ra n es i s a s l l w s b e rsi n s 40 c t 5c. 2 se e te rmin ly s e ct in . 3 a n al inuts with sl e w rate s e cee d i n 27 /s ull - s c ale inut s i ne wae 3.5 mh within the acquis iti n time may caus e a n i n cr r ect re sult t e ret urn ed y t h e c ne r te r. 4 fr u ll cm m n m de ra n e se e 5 saml e tes t ed d uri n initial rel e ase t ens ure cml iance. th i s d e i ce i s er a t i n a l wi t h a n etern a l re er e n c e i n t h e ra n e 0.1 t 3. 5 i n di eren t i a l m de a n d 0.1 t dd i n seu d- d i e re n t i a l a n d si n le- e n d ed m des . s e e the re e re nce se cti n r mre inrmatin. 7 mea s ure d wi t h a m i dsca l e dc i n ut . re. pr g pae 32
prelim inary technical data ad7933/AD7934 timing specifications 1 v dd = v dr i v e =2 .7 v t o 5.25 v , i n t e r n al/e xt er na l v ref = 2.5 v , u n les s o t h e r w is e n o ted , f clkin = 24 mh z, f sam p l e = 1.5 ms ps; t a = t min to t max , u n l e ss ot he r w i s e note d. table 3. imit at t min t ma parameter ad7933 AD7934 nit description f c i n 2 1 0 1 0 kh min 24 2 4 mh max t iet 10 10 ns min minimum time between end of read and start of next conver sio n i.e. time from when the data bus goes into three-state unti l the next falli ng ed ge of convst . t 1 10 10 ns min convst pulse idth. t 2 20 20 ns min convst falling edge to cin falling edge setup time. t 3 tbd tbd ns min cin falling edge to bs rising edge. t 4 0 0 ns min cs to r setup time. t 5 0 0 n s m i n cs to r hold time. t 6 2 5 2 5 n s m i n r pulse idth. t 7 10 10 ns min data setup tim e before r . t 8 5 5 ns min data hold after r . t 9 0 . 5 t c i n 0.5 t c i n ns min new data valid be fore falling e d ge of bs. t 10 0 0 ns min cs to rd setup time. t 11 0 0 ns min cs to rd hold time. t 12 55 55 ns min rd pulse idth. t 13 3 50 50 ns max data access time after rd . t 14 4 5 5 ns min bus relinquis h t ime after rd . 40 40 ns max bus relinquis h t ime after rd . t 15 15 15 ns min hben to rd setup time. t 16 5 5 ns min hben to rd hold time. t 17 10 10 ns min minimum time between readsrites. t 18 0 0 ns min hben to r setup time. t 19 5 5 ns min hben to r hold time. t 20 tbd tbd ns min cin falling edge to bs rising edge. 1 sa m p le t e st e d duri n g i n i t i a l relea s e t o en sure com p li a n ce. a l l i n put si gn a ls a r e sp eci f i e d wi t h t r t f 5 n s (10 t o 90 of v dd ) a n d t i m e d from a vo lt a g e l e vel o f 1.6 v. all timing specifica t ions given above a r e with a 25 pf loa d c a p a c i t a n c e . s e e a n d . f i gure 37. ad7933 AD7934 paralle l inter f aceconver si on a n d r e a d cyc l e i n o rd mo de ( 1 ) figure 3 8 f i g u r e 3 9 f i g u r e 4 0 2 mark s pace ratio for cin is 4060 to 6040. 3 the time re quired fo r the o u tput to cro s s tbd. 4 t 14 i s deri ve d from t h e m e a s ur ed t i m e t a ken by t h e da t a o u t p ut s t o ch a n ge 0. 5 v. th e m e a s ur ed n u m b er i s t h e n ext r a p ola t ed ba ck t o r e m o ve t h e e f f e ct s of ch a rgi n g or d i s c harging the 25 pf capacito r. this me ans that the tim e t 14 quoted in the timing char acteris t i c s is the true bus rel i nquis h time of the part and is ind e pend ent of the bus loa d i n g. rev. pr g page 7 of 32
ad7933/AD7934 prelim inary technical data absolute maximum ratings t a = 2 5 c , u n l e ss ot he r w i s e not e d. table 4. p a r a m e t e r r a t i n g v dd to agndd gnd 0.3 v to +7 v v drive to agnddgnd 0.3 v to v dd +0.3 v analog input voltage to agnd 0.3 v to v dd + 0.3 v digital input voltage to dgnd 0.3 v to +7 v v drive to v dd 0.3 v to v dd + 0.3 v digital output v o ltage to agnd 0 . 3 v t o v driv e + 0 . 3 v v ref i n to agnd 0.3 v to v dd + 0.3 v agnd to dg nd 0.3 v to +0.3 v input current to any pin except supplies 1 1 0 m a operating tem p erature range commercia l (b version) 40c to +85c storage temperature range 65c to +150c unction tempe r ature 150c a thermal impedance 97.9c (tsso p) c thermal impedance 14c (tssop ) ead temperature soldering reflow temperature (10 sec to 3 0 sec) 255c e s d 2 k v 1 transient currents of up to 100 ma wi ll not cau s e scr latch-up. s t r e s s es a b o v e t h os e lis t e d u n de r a b s o l u t e m a xi m u m r a t i n g s ma y c a us e p e r m a n en t dama ge t o t h e de vice . this is a s t r e s s ra t i n g onl y f u n c t i o n al o p era t ion o f t h e de vice a t t h es e o r an y o t h e r con d i t io ns a b o v e t h os e list e d i n t h e o p era t io nal s e c t io n s o f t h is sp e c if ic a t io n is n o t i m pli e d . e x p o sur e t o a b s o l u t e max i m u m ra t i ng co ndi t i on s fo r ex ten d e d p e r i o d s ma y a f fe c t de vice r e l i ab i l i t y . esd cation esd (electrostatic discharge) sensitive device. ele c tr ostatic charg e s as high as 4000 v readily accumulate on the human body and test eq uipment and can discharg e wit h out detection. althou gh this product features proprietary esd protection circu i try permanent dama ge may occur on devices subjected to high energy electrostatic discharges. theref ore prop er esd precautions a r e recommended to avoid perform a nce degradation or l o ss of functiona l ity. rev. pr g page 8 of 32
prelim inary technical data ad7933/AD7934 pin conf iguration and fu nction descriptions 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 w/b db0 db1 db4 db3 db2 v dd v in 2 v in 1 v in 0 cs agnd v refin/ v refout db5 db6 db7 db9 dgnd v drive rd wr convst db10 db8/hben db11 busy clkin v in 3 ad7933/ AD7934 top view (not to scale) 03713-0-006 f i gure 2. pin config ur ation ta ble 5. pi n f u nct i on d e s c ri pt i o n pin no. mnemonic description 1 v dd power supply input. the v dd ran g e for the ad79 33/AD7934 is from 2.7 v to 5.25 v. the supply should be decoupled to agnd with a 0.1 f capa citor and a 10 f tantal um capacitor. 2 w/b word/ b yte input. when this inp ut is logic high, word transfer m o d e is enabl e d and data is trans f erred to and from the ad793 3/AD7934 in 12-/10-bit words on pins db0/ db2 to db11. when this pin i s logic low, byte transfer mode is enabled. data an d the channel i d is transferred on pins db0 to db7 and pin db8/hben assumes its hbe n functionality. 3 to 10 db0 to db7 data bits 0 to 7. t h ree-state para llel d i gital i/ o pi ns that provid e the conversi on r e sult and also a l low the control regi ster to be program m ed . these pins are controlled b y cs , rd , and wr . the logic high/low vo ltage levels for these pins are determi n ed by the v drive input. when reading from the ad7933, the tw o lsbs (db0 and db1) are always 0 and the lsb of the co nversi on result is avai lab l e on db2. 11 v drive logic power supply input. t h e voltage supp lie d at this pi n determines at wh at voltage the par a lle l interface of the ad7933/ad 7934 will ope rate. this pin should be deco upled to dgnd. the v o ltage at this pi n may be different to that at v dd but should never exceed v dd by more than 0.3 v. 12 dgnd digital ground. this is the ground reference point for all digital circuitry on the ad7933/ad793 4. the dgnd and agnd voltages should ideally be at the same potenti al and must not be more than 0.3 v apart, even on a transient ba sis. 13 db8/hben data bit 8/ high byte enable. when w/b is high, this pin acts as data bit 8, a three-state i/o pin tha t is controlled by cs , rd , and wr . when w/b is low, this pin acts as th e hi gh byte enable pin. when hben is low, the low byte of data written to or read from the ad7933/AD7934 is on db 0 to db7. when hben is high, the top four bits of the data being written to or read from the ad7 933/ad 7934 are on db0 to db3 when reading from the device, db4 of the high byte is always 0 an d db5 and db6 will co ntain th e id of the channel for whic h the convers i on result corres pon d s ( s ee channel ad d r ess bits in t a ble 9) . when writing to the dev i ce , db4 to db7 of the high byte must be all 0s. note that wh en reading from the ad7933, the two ls bs in the low byte are 0s and the remaining 6 bits, conversi on data. 14 to 16 db9 to db11 data bits 9 to 11. t h ree-state par a lle l d i gital i/o p i ns that provid e the conversi on r e sult and also a l low the control regi ster to be program m ed in wo rd mode. these pins are contro lled b y cs , rd , and wr . the logic high/low vo ltage levels for these pins are deter mined by the v dr i v e input. 17 busy busy output. lo gic output indic a ting the status of the conversi o n . the bu sy output goes high following the falling edge of convst and stays high for the duration of the con versi o n . once the con version i s comp lete and the result is available in the output register, the busy output will go lo w. t h e track- and-hold returns to track mode just prior to the falling edge of busy, and the acqu isition t ime for the part begins when bu sy goes low. 18 clkin master clock in put. t h e clock s o urce for the co nversio n pr oc ess is applied to this pin. con versi on time for the ad7933/ad793 4 takes 13.5 clock cycles. the fre q uency of the master clock inpu t therefore dete rmines the conver sion time and ac hievable throughput rate. 19 convst conversion start input. a falling edge on convst is used to initiate a conversi o n . the track-and-h o ld goes from track to hold mode on the falling edge of convst and the conver sion process is initiate d at this point. foll owing p o we r-d own, whe n o p erating in the auto shutdown or auto standby mode, a rising edge on convst is used to power up the device. rev. pr g page 9 of 32
ad7933/AD7934 prelim inary technical data pin n. mnemnic descritin 20 r rite inut. acti e lw lic in ut used in cn unctin with cs t write data t th e cntrl reister. 21 rd read inut. acti e lw lic in ut used in cn unctin with cs t access the c ne r sin re sult. t h e cner sin result is la c ed n the data u s ll win the al l in ed e rd read while cs is l w. 22 cs chi select. acti e lw l ic in ut used in cn unctin with rd and r t read cnersin data r writ e data t the cntrl reister. 23 agnd anal grund. this is the rund reerence int r all anal circuitry n the ad7933/ad793 4. all anal inut sinals an d any eternal r e erence sin al shuld e reerred t this agnd ltae. the agnd and dgnd ltaes shuld ideally e at the sa me tentia l and must nt e mre th an 0.3 aart, een n a transient asi s. 2 4 ref i n / ref o ut reerence inut/ outut. this in is c nnected t the internal reerence and is the reerence surce r the ad c. the nminal i n ternal reeren c e ltae is 2.5 and this ae ar s at this in. t h is in can e er drien y an eternal reere n c e. the inut ltae rane r the eternal reerence is 0. 1 t 3.5 r diere ntial mde and is 0.1 t dd in sinle-e nded and seud-dier e ntial mde, deendin n dd . 25 t 2 in 0 t in 3 anal inut 0 t anal inut 3. f ur anal i n ut channel s that are mu ltile e d int the n-chi trac-and- hld. t h e anal inuts can e rrammed t e ur sinle e n d e d inuts, tw ully d i erential air s r tw seud-dierential airs y settin the mode its in the cntrl reister ar r iately see tale 9. the anal inut channel t e cnerted can either e sele cted y w r itin t the addres s its add1 and add0 in the cntrl reister rir t the cnersi n, r th e n-c hi seque n cer can e use d . the inut rane r all inut channe ls ca n either e 0 t ref r 0 t 2 ref and the cdin can e inary r tws cm le ment, deendin n the states the range and co ding its in the cntrl rei ster. any unsed inut channels shuld e cnnected t ag nd t aid ni s e i cu. re. pr g pae 10 32
ad7933/AD7934 prelim inary technical data terminology in t e g r a l no n l i n e a r i t y this is t h e maxi m u m d e v i a t io n f r o m a st ra ig h t l i ne p a ssin g th r o ugh th e en d p o i n t s o f th e ad c tra n sf e r fun c ti o n . th e end p o i n t s o f t h e t r a n sfer f u n c t i o n a r e zer o s c al e , a p o i n t 1 ls b b e lo w t h e f i rst c o de t r a n si t i o n , and f u l l s c a l e, a p o in t 1 l s b a b o v e t h e las t c o de t r a n si t i o n . ne g a t i v e g a i n e r r o r m a t c h this is t h e dif f er en ce in n e g a t i ve ga in er r o r b e t w e e n an y tw o chan nel s . c h an nel-t o -c h a n n el i s ol a t i o n i t is a m e asur e of t h e le vel o f cr osst a l k b e tw e e n cha n n e ls. i t is m e as ur ed b y a p p l yin g a f u l l -s ca le sin e wa v e sig n al t o th e t h r e e non s el e c te d i n put ch an nel s a n d a p ply i ng a 5 0 k h z s i g n a l to t h e s e le c t e d cha n nel. th e cha n n e l-to -cha n n el is o l a t io n is def i n e d as th e ra ti o o f th e po w e r o f th e 50 k h z si gn al o n t h e s e lect e d cha n n e l t o t h e p o w e r o f t h e n o is e sig n al t h a t a p p e a r s in t h e ff t o f t h is cha nnel. d i f f erenti a l n o n l i n e a r i ty this is t h e dif f er en ce b e tw e e n t h e m e as ur e d a nd t h e ide a l 1 l s b c h a n g e be tw een a n y tw o a d j a cen t cod e s i n t h e a d c . off s et e r r o r this is t h e de via t io n o f t h e f i rs t co de tra n si tio n (00 . . .000) t o ( 0 0 . . . 0 0 1 ) f r o m t h e i d e a l , i . e . , a g n d + 1 l s b p o w e r su pp l y re j e c t i o n r a t i o ( p sr r ) i t is def i ne d as t h e r a t i o o f t h e p o w e r in t h e ad c o u t p ut a t f u l l - sc al e f r eq u e n c y , f , t o th e p o w e r o f a 100 mv p-p sin e wa v e ap p l i e d t o t h e a d c v dd su p p ly of f r e q u e nc y f s . t h e f r e q u e n c y o f t h e in p u t va r i es f r o m 1 khz to 1 mh z. off s et e r r o r ma t c h this is t h e dif f er en ce i n o f fs et e r r o r b e tw e e n an y tw o cha n n e ls. ga in er r o r this is t h e de via t io n o f t h e l a s t co de tra n s i tio n (111 . . .110) t o (111 . . . 111 ) f r o m the ideal ( i .e ., v ref C 1 ls b) a f t e r t h e o f fs et er r o r has b e en ad j u s t e d o u t. ps rr (db) = 10 log( pf / pf s ) pf is t h e p o w e r a t f r e q ue n c y f in t h e a d c o u t p u t ; pf s is t h e po w e r a t f r eq u e n c y f s in t h e ad c o u t p ut. ga in er r o r m a t c h this is t h e dif f er en ce i n ga i n er r o r b e tw e e n an y tw o cha n n e ls. t r a c k-and-h o l d a c q u i s iti o n t i me the t r ack - an d - h o ld am plif ier r e t u r n s in t o t r ack m o de and t h e end o f co n v ersi o n . t h e t r ack - and- h o ld ac q u isi t io n t i m e is t h e ti m e r e q u i r e d f o r th e o u t p u t o f t h e tra c k - a n d - h o ld a m p l i f i e r t o r e ach i t s f i na l v a l u e, wi t h i n 1/ 2 ls b , a f ter t h e end o f co n v ersio n . e r o -c o d e e rro r this a p plies w h en usin g t h e t w os co m p lem e n t o u t p ut co d i n g opt i on , i n p a r t i c u l ar to t h e 2 v ref in p u t ran g e w i t h ?v ref to +v ref bi a s e d a b out t h e v refin p o in t. i t is t h e d e v i a t ion o f t h e mids cale tran si t i o n (al l 0s t o al l 1s) f r o m th e ide a l v in vol t ag e, i. e. , v ref . s i g n a l -t o-(n o i s e + dis t o r t i o n ) r a t i o (s in ad) t h i s i s t h e me a s u r e d r a t i o of s i g n a l - t o - ( n oi s e + d i stor t i on ) a t t h e o u t p ut o f t h e ad c. th e sig n al is t h e r m s am pli t ude o f t h e f u ndam e n t a l . n o is e is t h e sum o f a l l n o nf u ndam e n t a l sig n a l s up t o half th e s a m p lin g f r e q uen c y (f s /2), e x cl udin g dc. the ra t i o is dep e n d e n t on t h e n u m b er o f q u a n t i za t i on le vels in t h e d i gi t i za ti o n p r o c e s s; th e m o r e lev e l s, th e sm alle r th e q u a n tiz a ti o n n o i s e . th e t h eo r e tical si gn al-t o- (n o i se + d i s t o r tio n ) ra tio f o r a n id eal n-b i t co n v er t e r wi th a sin e wa v e in p u t is g i v e n b y e r o -c o d e e rro r m a t c h this is t h e dif f er en ce i n zer o -co d e er r o r b e tw e e n an y tw o chan nel s . po s i t i v e g a i n e r r o r this a p plies w h en usin g t h e t w os co m p lem e n t o u t p ut co d i n g opt i on , i n p a r t i c u l ar to t h e 2 v ref in p u t ran g e w i t h ? v ref to +v ref bi a s e d a b out t h e v refin p o in t. i t is t h e d e v i a t ion o f t h e la st co de tra n s i tio n (011. . .110) t o ( 011 .. . 111) f r o m the ideal ( i .e ., +v ref C 1 ls b) a f t e r t h e zer o -c o d e er r o r has b e en ad j u st e d o u t. sig n al - t o - ( n o i s e + d i s t or t i on ) = (6.02 n + 1.76) db po s i t i e a i n e r r o r m a t this is t h e dif f er en ce i n p o si t i ve ga in er r o r b e t w e e n an y tw o chan nel s . th us, f o r a 12-b i t con v er t e r , this is 74 db , an d f o r a 10-b i t co n v er t e r , t h is is 62 db . ne g a t i v e g a i n e r r o r this a p plies w h en usin g t h e t w os co m p lem e n t o u t p ut co d i n g opt i on , i n p a r t i c u l ar to t h e 2 v ref in p u t ran g e w i t h ?v ref to +v ref bi a s e d a b out t h e v ref p o i n t. i t is t h e d e vi a t io n o f t h e f i rst co de tra n s i tio n (100 . . . 000 ) t o (100 . . . 001 ) f r o m the ideal ( i .e ., ?v refin + 1 ls b) a f t e r t h e zer o - c o d e er r o r has b e en ad j u s t e d out . rev. pr g page 11 of 32
ad7933/AD7934 prelim inary technical data t o t a l ha r m on i c d i s t or t i on ( t h d ) t h d i s th e ra tio o f th e rm s s u m o f h a rm o n i c s t o th e f u ndam e n t al . f o r th e ad7933/AD7934, i t is def i n e d as () 1 6 5 4 3 2 v v v v v v thd 2 2 2 2 2 20log db + + + + ? = w h er e v 1 i s th e rm s a m p l i t ud e o f th e fun d a m en tal a n d v 2 , v 3 , v 4 , v 5 , a n d v 6 a r e t h e r m s am pli t udes o f t h e s e c o nd t h r o u g h t h e six t h ha r m o n i c s . p e a k h a rmo n i c o r s p uri o us n o is e p e a k ha r m o n ic o r sp ur io us n o is e is def i ne d as t h e r a t i o o f t h e r m s val u e o f t h e n e xt la rg es t com p on e n t i n t h e ad c o u t p ut s p ectr um (u p t o f s /2 a n d excl udi n g dc) t o t h e r m s val u e o f t h e f u ndam e n t a l . n o r m a l ly , t h e va lue o f t h is sp e c if ica t ion is det e r m i n e d b y t h e la rg es t ha r m o n ic in t h e sp e c t r um, b u t fo r ad cs w h er e t h e ha r m o n ic s a r e b u r i e d i n t h e no is e f l o o r , i t wi l l be a n o ise pea k inte r m o d u l at i o n d i s t or t i on w i t h in p u ts co nsis tin g o f sine wa v e s a t tw o f r eq uen c ies, fa and fb , a n y a c t i v e de v i ce wi th n o nlin ea ri ti e s will cr ea t e d i s t o r ti o n p r o d uc ts a t s u m a nd dif f er ence f r e q uen c ies o f mfa nfb w h er e m, n = 0, 1, 2, 3, et c. i n ter m o d u l a t i o n dis t o r t i on t e r m s a r e t h os e f o r wh ic h n e i t h e r m n o r n a r e e q ual t o zer o . f o r exa m p l e , th e seco n d -o r d er t e r m s in c l ude (fa + fb) a n d (fa ? fb), while t h e thir d - o r d er t e r m s in c l ud e (2fa + fb), (2fa ? fb), (fa + 2fb) a n d (fa ? 2fb). the ad7933/AD7934 is t e s t e d usin g th e c c if s t anda r d w h er e tw o in p u t f r e q u e n c ies n e a r t h e t o p end o f t h e i n p u t b a n d wi d t h a r e us e d . i n t h i s cas e , t h e s e cond-o r d er t e r m s ar e us ual l y dist an c e d i n f r e q uen c y f r o m t h e o r ig ina l sine wa ves, w h i l e t h e t h ir d-o r d er t e r m s a r e us ual l y a t a f r e q uen c y cl os e t o t h e i n p u t f r e q uen c ies. a s a r e su l t , t h e s e c o nd- and t h ir d - o r d er ter m s a r e sp e c if ie d s e p a ra t e l y . th e c a lc u l a t io n o f t h e in t e r m o d u l a t ion dist o r t i o n is a s p e r t h e th d sp e c if ica t ion w h er e i t is t h e ra t i o o f th e rm s s u m o f th e in d i v i d u al di s t o r ti o n p r od uct s t o th e rm s a m pli t ude o f t h e s u m o f t h e f u ndam e n t als expr es s e d i n db s. rev. pr g page 12 of 32
prelim inary technical data ad7933/AD7934 typical perf orm ance cha r acte ristics t a 25c, unles s t h e r w is e n te d . f i u r e 3 . p s r r s . s u l y ri le f r e q ue n c y i t h u t su l y d e c u li n f i u re 4. ch ann e l-t - c hann el is l at i n f i u re 5. a d 79 34 si na d s . a n al in u t f r equ e nc y r a ri us su l y lt a es f i u re . a d 79 34 f f t dd 5 f i u re 7. a d 79 34 t y ic a l d n l dd 5 f i u re . a d 79 34 t y ic a l inl dd 5 re. pr g pae 13 32
ad7933/AD7934 prelim inary technical data f i g u re 9. a d 79 34 c h ang e in inl v s . v re f fo r v dd = 5 v f i g u re 10 . a d7 93 4 chang e in dnl v s . v ref fo r v dd = 5 v f i gur e 1 1 . ad79 34 cha n ge i n enob vs . v ref for v dd = 5 v f i gur e 1 2 . ad79 34 o ffse t vs . v ref f i gur e 1 3 . ad79 34 h i sto g r a m o f co des @ v dd = 5 v wi th t h e interna l refer e nc e f i gur e 1 4 . ad79 34 h i sto g r a m o f co des @ v dd = 5 v wi th an ex t e r n al re fer e nc e rev. pr g | page 14 of 32
prelim inary technical data ad7933/AD7934 f i ur e 1 5 . ad79 33 fft dd 5 f i ur e 1 . ad79 33 t y i c a l dnl dd 5 f i ur e 1 7 . ad79 33 t y i c a l inl dd 5 re. pr g pae 15 32
ad7933/AD7934 prelim inary technical data contr o l register the co n t r o l r e g i s t er o n t h e ad7 933/AD7934 is a 12-b i t, wr i te-onl y r e g i s t er . da t a is wr i t t e n t o t h is r e g i s t er using th e cs a nd wr pi ns . t h e co n t r o l r e g i s t er is s h own b e lo w a nd t h e f u n c t i on s o f t h e b i ts a r e des c r i b e d in . a t p o w e r - u p , t h e def a u l t b i t s e t t in gs i n t h e co n t r o l r e g i s t er a r e al l 0 s . t a b l e 7 ta ble 7. co nt rol regi s t er bi t f u nct i on des c r i pt i o n table 6. co ntrol register bits m s b s b d 1 1 d 1 0 d 9 d 8 d 7 d 6 d 5 d 4 d 3 d 2 d 1 d 0 p m 1 p m 0 c o d i n g r e f z e r o a d d 1 a d d 0 m o d e 1 m o d e 0 s e 1 s e 0 r a n g e bit no. mnemonic description 11, 10 pm1, pm0 power manage ment bits. these two bits are used to select the power mo de of o p eration. the user can cho o se between either normal m o de or various po wer- down modes of operatio n as sh o w n i n . 9 coding this bit selects t h e output coding of the conversion result. if this bit is set to 0, th e output coding is straight (natural) binary. if this bit is set t o 1, the output coding is twos complement. 8 ref t h is bit selects whether the internal or a n exter n al referenc e is used to perform the conversi on. if this bit is logic 0, an externa l refer e nce sh ould be appli e d to the v ref pin, and if it is logic 1, the internal referen c e i s selected (see the reference section). 7 ero this bit is not used so it should always be set to logic 0. 6, 5 add1, add0 these two address bits ar e used to either select which analog input channel is t o be converted in the nex t conver sion, if th e sequencer i s n o t being used, or to se lect the final cha nnel i n a conse c utive seq u ence when the sequencer i s bei n g used as d e scribed i n . t h e selected input channel i s d e cod e d as sho w n i n . 4, 3 mode1, mode0 the two mode pins select the ty pe of analog input on the four v in pins. the ad7 933/AD7934 have either four single-e nd ed inputs, two fully differential inputs, or two pseud o -differential in p u t s ( s e e ) . 2 seq1 the seq1 bit in the control register is used in conj unction with t h e seq0 bi t to control the seq u encer function (see ) . 1 seq0 the seq0 bit in the control register is used in conj unction with t h e seq1 bi t to control the seq u encer function (see ) . 0 range this bit selects t h e analog input range of the ad7933/AD7934. if it is set to 0, the anal og input range extends from 0 v to v ref . if it is set to 1, the analog input range ex tends from 0 v to 2 v ref . wh en this range is selected, av dd must be 4.75 v to 5.25 v. t a b l e 8 table 8. power mode selection using the pow e r man a gement bits in the con t rol register t a ble 1 0 t a b l e 1 0 t a b l e 1 0 t a b l e 9 t a b l e 9 p m 1 p m 0 m o d e d e s c r i p t i o n 0 0 normal mode when operating in normal m o de, all circui try is fully powered up at all times. 0 1 auto shutdown when operating in auto shutdown mode, the ad7933/ AD7934 will enter full shutdown mode at the end of each con versi on . in this mode, all circuitry is powered down. 1 0 auto standby when the ad7933/AD7934 enter this mode, all c i rcuitry is partially powered down. this mode is similar to the auto shutdo w n mode but it allows the part to power up in 1 s. 1 1 full shutdown when the ad7933/AD7934 enters this mo de, all circuitry is powe r ed down . the information in the control register is retain ed. rev. pr g page 16 of 32
prelim inary technical data ad7933/AD7934 table 9. analo g input ty pe s e lection channel a ddre ss mo de0 = 0, m o de1 = 0 mo de0 = 0, m o de 1 = 1 mode0 = 1, m o de1 = 0 mode0 = 1, m o de1 = 1 four single-en d ed i/p channels two fully diff e r ential i/p channels two pseudo-di fferential i/p channels not used add1 add0 v in+ v in? v in+ v in? v in+ v in? 0 0 vin0 agnd vin0 vin1 vin0 vin1 0 1 vin1 agnd vin1 vin0 vin1 vin0 1 0 vin2 agnd vin2 vin3 vin2 vin3 1 1 vin3 agnd vin3 vin2 vin3 vin2 sequencer operat ion the co nf igura t i o n o f t h e s e q0 a nd s e q1 b i t s i n t h e co n t r o l r e g i s t er al lo w t h e us er t o us e t h e s e q u encer f u n c t i o n . t o u t l in es t h e tw o seq u en cer m o d e s o f o p era t io n . a b l e 1 0 table 10. sequ ence selection modes s e q 0 s e q 1 sequence t y pe 0 0 this configuration is se lected when the sequen ce function is n o t used. the analog input chann e l sele cted on each individual conv ersion i s determined by the contents of th e chan nel ad d r ess bits, add1 and add0, in each prior write operatio n . t h is mode of operati on reflects the n o rmal o p erat ion of a multichannel adc, without the seq u encer f u nction being used, where each write t o the ad7933/ad 7934 selects the next channel for conversi on. 0 1 n o t used. 1 0 not used. 1 1 this configuration is used in conjun ction with t h e chann e l ad d r ess bits, a dd1 and add0, to program continuous conver sion s on a conse c utive se quence of cha n nels from ch an nel 0 through to a selected final channe l as d e te rmined by the channe l ad d r ess bits in the c o ntrol register. when in d i fferential or pseudo-differential mode, inverse ch ann e ls (e.g., vin1, vi n0) are not converted in this mode. rev. pr g page 17 of 32
ad7933/AD7934 prelim inary technical data circuit i n formation the ad7933/AD7934 a r e fast, 4-c h a n n e l , 12-b i t a nd10-b i t, s i ng l e -sup ply , su c c e ss ive a p p rox ima t ion ana l o g -to - d i g i t a l co n v er t e rs. th e p a r t s o p era t e f r o m ei t h er a 2.7 v t o 3.6 v o r 4.75 v t o 5.25 v p o w e r s u p p l y a nd f e a t ur e thr o u g h p u t r a t e s u p t o 1.5 ms ps. w h en t h e ad c s t a r ts a con v ersio n (f igur e 19), sw3 wi l l o p e n a n d sw 1 a n d sw 2 w i ll m o v e t o p o s i ti o n b , ca u s i n g th e co m p a r a t o r t o b e co me u n bal a nced . b o th in p u ts a r e dis c o n n e c t ed on ce t h e co n v ersio n b e g i n s . th e co n t r o l log i c a nd c h a r g e r e dis t r i b u tio n d a cs a r e us ed t o add an d s u b t rac t f i xe d amou n t s of ch a r ge f rom t h e s a m p l i ng c a p a c i to r ar r a y s to br i n g t h e com p a r a t o r b a ck i n t o a b a lan c e d con d i t ion. w h en t h e c o m p ar ator i s re b a l a nc e d , t h e c o n v e r s i on i s c o m p l e te. t h e co n t r o l log i c g e n e ra t e s t h e ad c? s ou t p u t co de . the o u t p u t im p e dan c es o f t h e s o ur ces dr i v i n g t h e v in+ and t h e v in ? pi ns m u s t b e ma t c h e d; o t h e r w is e , t h e tw o i n p u ts wi l l ha v e dif f er en t s e tt l i n g t i me s , re su lt i n g i n e r ror s . the ad7933/AD7934 p r o v ide th e us er wi t h a n o n -c hi p trac k- a nd- h o ld , an i n ter na l acc u r a te refer e n c e, an a n a l o g -to - dig i t a l c o n v e r te r , and a p a r a l l el i n te r f ac e hou s e d i n a 2 8 - l e a d t s s o p pa c k a g e . the ad7933/AD7934 ha v e f o u r a n alog in p u t cha n n e ls tha t can b e co nf igur e d to b e fo ur sin g le-ende d in p u ts, t w o f u l l y dif f er en t i al p a irs, o r tw o ps eudo-dif fer e n t i a l p a irs. th er e is an o n - c hi p c h a n n e l seq u en ce r th a t allo w s th e use r t o se lect a co n s e c u t i v e s e quen ce o f cha n ne ls t h r o u g h w h i c h t h e a d c c a n c y c l e w i th ea ch falli n g ed g e o f co n v s t . 03713-0-024 v in+ v in? a b sw1 sw3 comparator control logic capacitive dac capacitive dac c s c s v ref sw2 b a the a n alog in p u t ra n g e f o r th e ad7933/ad79 34 is 0 t o v ref or 0 t o 2 v ref , de p e ndi n g o n t h e s t a t us o f t h e r a n e b i t i n t h e c o n t ro l re g i ste r . t h e output c o d i ng of t h e a d c c a n b e e i t h e r b i na r y o r tw o s co m p le m e n t , dep e ndin g on t h e st a t us o f t h e co d i n b i t i n th e co n t r o l r e gi s t e r . f i g u re 19. a d c co nvers i on p h as e adc tra n s f er func ti on the ad7933/AD7934 p r o v ide f l exi b le p o w e r ma na g e m e n t o p t i o n s t o al lo w us ers t o achie v e t h e b e st p o w e r p e r f o r ma n c e fo r a g i v e n t h r o u g h p u t r a t e . thes e o p t i o n s a r e s e le c t e d b y p r ogra m m i n g t h e po w e r m a n a g e m e n t b i ts, pm1 a n d pm0, in t h e c o n t ro l re g i ste r . the o u t p u t co din g f o r th e ad79 33/AD7934 is ei th er s t ra ig h t b i na r y o r tw o s co m p le m e n t , dep e ndin g on t h e st a t us o f t h e c o d i n g b i t in t h e con t r o l r e g i s t er . the desig n e d co de t r a n si t i o n s o c c u r a t s u cces s i v e l s b val u es (i .e ., 1 ls b , 2 ls bs, a nd s o o n ) and t h e l s b si ze is v ref /1024 f o r th e ad7933 and v ref /4096 f o r th e AD7934. the ideal tra n sf er c h a r ac t e r i s t ics o f th e ad7933 /AD7934 f o r bo th s t ra ig h t b i na r y a nd tw os c o m p l e me n t output c o d i ng ar e s h o w n i n f i g u re 2 0 a n d fi g u re 2 1 , r e s p ecti v e l y . converter operation the ad7933/AD7934 a r e a s u c c es si v e a p p r o x ima t ion ad c b a s e d on t w o c a p a c i t i ve d a c s . f i g u re 1 8 an d fi g u re 1 9 show sim p lif i e d s c h e ma t i cs o f t h e a d c in acq u isi t i o n an d con v ersio n ph a s e, re sp e c t i v e ly . t h e a d c c o m p r i s e s of c o n t ro l l o g i c , a s a r , a nd t w o ca p a c i t i v e d a cs. b o t h f i gur e s s h o w t h e o p era t ion o f t h e ad c in dif f er en t i a l /ps e udo - dif f er en t i al m o de . sin g le- e nde d m o de o p er a t i o n i s si m i la r b u t v in? is in t e r n a l ly t i e d t o a g nd . i n t h e ac q u isi t ion phas e , sw3 is clos e d , sw1 and sw2 a r e in p o si tio n a, th e co m p a r a t o r is he ld in a ba lan c e d co n d i t io n, and t h e s a m p li n g c a p a ci t o r a r ra ys acq u ir e t h e dif f er en t i al sig n al o n t h e i n p u t. 03713-0-025 000...000 111...111 1 lsb = v ref /4096 (AD7934) 1 lsb = v ref /1024 (ad7933) 1 lsb +v ref 1 lsb analog input adc code 0v note: v ref is either v ref or 2 v ref 000...001 000...010 111...110 111...000 011...111 03713-0-023 v in+ v in a b sw1 sw3 comparator control logic capacitive dac capacitive dac c s c s v ref sw2 b a f i gur e 2 0 . ad79 33 /ad7 93 4 idea l t r a n s f e r cha r a c t e r i stic with str a ight bin a r y o u tput c o ding f i g u re 18. a d c ac quis it i o n p h as e rev. pr page 18 of 32
prelim inary technical data ad7933/AD7934 analog input struc t ure 03713-0-026 100...000 011...111 1 lsb = 2 & v ref /4096 (AD7934) 1 lsb = 2 & v ref /1024 (ad7933) ?v ref + 1 lsb v ref +v refv ? 1 lsb adc code 100...001 100...010 011...110 000...001 000...000 111...111 f i gur e 23 s h o w s t h e e q ui vale n t cir c ui t o f t h e a n alog in p u t s t r u c t ur e o f th e ad7933/ad79 34 in dif f er en t i a l /ps e udo- dif f er en t i a l mo de. i n sing le-e nde d m o de, v in? is in t e r n a l ly t i e d to a g n d . t h e f o u r d i o d e s prov i d e e s d prot e c t i on f o r t h e a n alog i n p u ts . c a r e m u s t be tak e n t o e n s u r e tha t th e a n alog in p u t sig n als ne v e r exce e d t h e su p p l y ra ils b y m o r e t h a n 300 mv . this c a us es th es e dio d es t o become f o r w a r d-b i as ed and st a r t co nd uc t i ng in to t h e subst r a te. th e s e di o d e s ca n cond uc t u p t o 10 ma wi t h o u t ca usin g ir r e v e rsi b le da mage t o t h e p a r t . the c1 c a p a ci t ors, in f i gur e 23, a r e typ i cal l y 4 p f a n d can p r i m a r i l y b e a t tri b u t ed t o p i n ca pa c i ta n c e . t h e r e s i s t o r s a r e lu m p e d c o m p o n e n t s m a d e up of t h e on re s i st a n c e of t h e swi t ch es. th e va l u e o f th es e r e sis t o r s is typ i cal l y a b o u t 100 ?. the c2 c a p a ci t ors, in f i gur e 23, a r e t h e ad c s s a m p ling c a pa ci t o r s a n d h a v e a t y p i c a l ca pa c i ta n c e o f 1 6 p f . f i gur e 2 1 . ad79 33 /ad7 93 4 idea l t r a n s f e r cha r a c t e r i stic with t w os c o mple ment o u tput coding tpical connection diaram f i gur e 2 2 f i g u re 22. t y pic a l conne c t io n d i ag r a m s h o w s a typ i cal co nn e c tio n dia g ram f o r th e ad7933/ad79 34. th e a g nd a nd d g nd p i ns a r e co nn ec t e d t o g e t h er a t t h e de vice fo r g o o d n o is e s u p p r es si o n . th e v refin /v refo ut p i n is de cou p le d to a g n d w i t h a 0.47 f c a p a c i tor to a v oi d noi s e pi c k up , i f t h e i n te r n a l re fe re nc e i s u s e d . a l te r n a t iv ely , v refin /v refo ut ca n b e co nn ec ted t o a ext e r n al re f e re nc e s o u r c e , an d i n t h i s c a s e , t h e re f e re nc e pi n s h ou l d b e deco u p led wi th a 0.1 f ca p a c i to r . i n bo th cas e s , th e a n alog in p u t ra n g e c a n ei t h er b e 0 v t o v ref (ran ge b i t = 0) o r 0 v t o 2 v ref (r an ge b i t = 1). th e a n a l og in p u t conf igura t io n is ei t h er fo ur sin g le-e n d e d i n p u ts, tw o dif f er en t i al p a irs o r tw o ps eudo-dif fer e n t ia l p a irs (s e e ) . the v dd pi n c o n n e c t s to ei t h er a 3 v o r 5 v s u p p ly . th e vol t a g e a p plie d to t h e v dr iv e in p u t co n t r o ls t h e v o l t a g e o f t h e dig i t a l i n t e r f ac e , a nd h e r e , i t is c o n n e c t e d to t h e s a me 3 v supp ly of t h e m i c ropro c e ss or to al lo w a 3 v log i c in t e r f ace (s e e th e s e c t io n). f o r a c a p pl i c a t i o ns , re mov i ng h i g h f r e q u e nc y c o m p o n e n t s f rom t h e a n a l og in p u t sig n a l is r e co mmende d b y usin g a n r c lo w- p a s s f i l t er o n t h e r e le van t a n alog in p u t p i n s . i n a p plic a t ion s w h er e ha r m oni c dis t o r t i o n and sig n al-t o- n o is e ra t i o a r e cr i t ical, t h e a n alog in p u t s h o u l d b e dr i v en f r o m a lo w i m p e dance s o urce . l a r g e so ur ce im pe d a n c e s s i gn i f ica n tl y a f f e ct th e a c pe rf o r m a n c e o f t h e a d c. thi s ma y ne ces s i t a te t h e us e o f an i n p u t b u f f er am pl i f i e r . t h e c h oi c e of t h e op am p i s a f u nc t i o n of t h e p a r t ic u l a r a p plica t ion. r1 c2 v in + v dd c1 d d 03713-0-028 r1 c2 v in v dd c1 d d t a b l e 9 d i g i tal i n p u t s 03713-0-027 0.1 f1 0 f 3v/5v supply 3v supply c/ p ad7933/AD7934 0.1 f 0.1 f external v ref 0.47 f internal v ref 0 to v ref / 0 to 2 v ref agnd dgnd w/b clkin cs v drive v in 0 v dd v refin /v refout v in 3 10 f 2.5v v ref rd convst wr busy db0 db11/db9 f i g u re 23. equiv a le nt a n al og input c i rcuit , conve r s i o n p h as e sw it ches, o p en t r a c k p h as e s w itc h es c l osed w h en n o am pli f ier is us e d t o dr i v e t h e a n alog in p u t, t h e s o ur ce im p e dan c e sh ou ld b e li mi t e d to lo w val u es. the maxim u m s o ur ce im p e dance w i l l dep e nd o n t h e am o u n t o f thd t h a t can be t o le ra t e d . th e t h d in cr ea ses a s th e so ur ce im pe d a n c e in cr e a s e s an d p e r f o r ma n c e deg r ades. f s h o w s a g r a p h o f t h e thd v e rs us t h e a n alog in p u t sig n al f r e q uenc y fo r dif f e r en t s o ur ce im p e dances fo r b o t h v dd = 5 v a nd 3 v . i gur e 2 4 rev. pr g page 19 of 32
ad7933/AD7934 prelim inary technical data 0.47 f 1.25v v in r r 3r 0v 1.25v 2.5v 0v v in0 v in3 v refout ad7933/ AD7934 additional pins omitted for clarit 03713-0-031 f i g u re 24. th d v s . a n al og input f r equ e nc y f o r v a ri ous s o ur c e impeda nc es f i g u re 2 5 show s a g r a p h of t h e t h d ve r s u s t h e an a l o g i n put f r eq uen c y f o r va r i o u s s u p p lies, while s a m p ling a t 1.5 m h z wi th a n sclk o f 20 mh z. i n this c a s e , th e s o ur ce im p e dance is 10 ?. f i g u re 25. th d v s . a n al og input f r equ e nc y f o r v a ri ous su p p ly v o lt ag es analo inputs the ad7933/AD7934 ha v e s o f t wa r e s e lec t ab le a n alog in p u t co nf igura t io n s . u s ers c a n ch o o s e ei t h er fo ur sin g le-e n d e d in p u ts, tw o f u l l y dif f er en t i al p a irs, o r tw o ps eudo-dif fer e n t i a l p a irs. the a n a l og i n p u t conf ig ur a t ion is ch os e n w i t h bi t s mo d e 0 / mo de1 i n t h e i n ter nal con t r o l reg i st e r (s e e ) . t a b l e 9 single-ended mode the ad7933/AD7934 can ha ve f o ur sin g le-en d ed a n alog in p u t cha n n e ls b y s e t t in g t h e mo d e 0 a nd mo d e 1 b i ts in t h e con t r o l r e g i s t er b o t h t o 0. i n a p pli c a t io ns w h er e t h e sig n al s o ur ce has a hig h i m p e dan c e, i t is r e co mm e nde d t o b u f f er t h e a n alog in p u t b e fo r e a p ply i n g i t t o t h e ad c. th e analog in p u t ra n g e is ei t h er 0 to v ref o r 0 t o 2 v ref . i f t h e a n alog i n p u t sig n al t o b e s a m p le d is b i p o l a r , t h e in t e r n al r e f e r e n c e o f th e a d c ca n be us ed t o e x t e rn all y b i a s u p th i s sig n al t o ma k e i t o f t h e co r r e c t fo r m a t fo r t h e a d c. f i g u re 2 6 f i gure 26. sing le -ended mod e conn e c t ion d i agr a m differenti a l m o de the ad7933/AD7934 can ha ve tw o dif f er en t i al a n alog in p u t p a irs b y s e t t in g bi ts mo d e 0 a nd mo d e 1 in t h e co n t r o l r e g i s t er t o 0 an d 1, r e s p ec ti v e l y . dif f er en t i al sig n als ha v e s o m e b e n e f i t s o v er sin g le-e n d e d sig n a l s, in cl udi n g n o is e imm u ni ty b a s e d o n t h e de vice s c o m m on - m o d e re j e c t i o n a n d i m prove m e n t s i n d i s t or t i on p e r f o r ma n c e . f d e f i n e s t h e f u l l y dif f er en t i al a n alog in p u t o f th e ad7933/AD7934. i gur e 2 7 f i g u re 27. d i f f e r e nt ia l input d e f i nit i on 03713-0-032 v ref p-p v in v in v ref p-p additional pins omitted for clarit ad7933/ AD7934 common-mode voltae the am pli t ude o f t h e dif f er en t i al sig n al is t h e dif f er en ce b e tw e e n t h e sig n als a p plie d t o t h e v in+ and v in? p i n s in eac h dif f er en t i al p a ir (i .e ., v in+ ? v in ? ). v in+ a nd v in ? shou l d b e sim u l t an e o us l y dr i v en b y tw o sig n als, e a c h o f a m p l i t ude v ref tha t a r e 180 o u t o f p h as e . th e a m p l i t ude o f t h e dif f er en tial sig n al is t h er efor e ?v ref to + v ref peak - t o-peak ( i . e . , 2 v ref ). t h i s i s re g a rd l e ss of t h e c o m m on mo d e ( c m ) . t h e c o m m o n m o de is t h e a v e r a g e o f t h e tw o sig n als, i . e . (v in+ + v in? ) / 2, a nd i s t h er efo r e t h e v o l t a g e t h a t t h e two in p u ts a r e cen t er e d on. this r e s u l t s i n t h e s p a n o f ea c h in p u t be in g c m v re f /2. this v o l t a g e has t o b e s et u p ext e r n a l ly a n d i t s ra n g e va r i es wi t h v ref . a s t h e val u e o f v ref in cr e a s e s, t h e comm o n - m o d e ra n g e de cr e a s e s. w h e n dr i v in g t h e i n p u ts wi t h a n a m plif ier , t h e ac t u a l co mm o n - m o d e ra n g e is det e r m in e d b y t h e am plif ier s o u t p ut v o l t a g e s w in g. f i gur e 28 a nd f i gur e 29 s h o w ho w th e co mm on-m o d e ra n g e typ i cal l y va r i es wi t h v ref fo r b o t h a 5 v and a 3 v p o w e r su p p ly . the co mm on mo de m u st b e in t h is ra n g e t o guara n t e e t h e f u n c tio n al i t y o f th e ad7933 /AD7934. show s a t y pi c a l c o n n e c t i on d i ag r a m w h e n o p e r a t i n g t h e ad c in si ng le-e n d e d m o de. rev. pr g page 20 of 32
prelim inary technical data ad7933/AD7934 using an op a m p p a ir w h en a con v ersio n t a k e s pl ace , t h e comm o n mo de is r e je c t e d r e su l t in g i n a vi r t ua l l y n o is e f r e e sig n a l o f a m pl i t ud e ?v ref to +v ref co r r es p o n d in g t o t h e dig i tal co des o f 0 t o 1024 f o r th e ad7933 an d 0 to 4096 f o r th e AD7934. an o p a m p p a ir ca n be us e d t o dir e c t l y co u p le a dif f er en t i al sig n al t o o n e o f th e a n alog in p u t p a irs o f th e ad7933/AD7934. the cir c ui t conf igur a t io n s sh ow n i n a n d sh o w h o w a d u a l o p a m p can b e us e d to con v er t a sin g le-e nde d sig n al in t o a dif f er en t i a l sig n al fo r b o t h a b i p o lar a n d u n i p ola r i n p u t s i gn al , r e s p ecti v e l y . f i gur e 3 0 f i gur e 3 0 f i gur e 3 0 f i gure 3 0 . dua l o p a m p cir c ui t to co nv er t a sing l e -e nded u n ipol ar sig n al int o a d i f f e r e nt ia l s i g n al f i gur e 3 1 f i gur e 3 1 f i g u r e 3 1 f i gure 3 1 . dua l o p a m p cir c ui t to co nv er t a single -ended bipolar s i gn al int o a d i f f e r e nt ia l s i g n al v ref (v) common-mode rane (v ) 3.5 3.0 2.0 1.5 2.5 1.0 0.5 0 0 0.5 1.5 1.0 2.0 2.5 3.0 03713-0-033 the v o l t a g e a p plie d t o p o i n t a s ets u p t h e co mm on- m o d e vol t a g e. i n b o t h di a g r a m s , i t is c o nn e c te d in s o m e wa y to t h e r e fer e n c e , b u t an y val u e i n t h e co mm o n - m o d e ra n g e can b e in p u t her e t o s e t u p th e co mm o n m o de . a s u i t ab le d u al o p a m p t h a t co u l d b e us e d i n t h is co nf ig ur a t io n to p r o v i d e dif f er en t i a l dr i v e t o the ad7933/AD7934 is th e ad8022. t a k e ca r e w h en ch o o sin g t h e o p a m p; t h e s e le c t i o n dep e nds o n t h e r e q u ir e d p o w e r s u p p ly a nd sys t em p e r f o r m a n c e ob je c t i v es. the dr i v er cir c ui ts i n a n d a r e o p t i mi ze d fo r d c c o upl i ng a p p l i c a t i o ns re qu i r i n g b e st d i s t or t i on p e r f or m a nc e . f i gure 28. input common-m ode r a ng e vs . v ref (0 t o v ref ra ng e , v dd = 5 v ) the cir c ui t conf igura t io n s h ow n i n c o n v er ts a uni p ol a r , sin g le- e n d e d sig n al in to a dif f er en t i al sig n al. v ref (v) common-mode range (v ) 4.5 4.0 3.0 1.5 2.0 2.5 3.5 1.0 0.5 0 0.1 0.6 1.6 1.1 2.1 2.6 03713-0-034 the cir c ui t conf igura t io n i n i s c o nf igur e d t o co n v er t a nd le ve l s h if t a sin g le-e n d e d , g r o u n d -r efer en c e d (b i p ola r ) sig n al t o a dif f er en t i al sig n al ce n t er e d a t t h e v ref lev e l o f the ad c. 2 v ref p-p v ref gnd 390 ( 220 ( 220 ( 20k ( 220 ( 10k ( 27 ( 27 ( v+ v v+ v a v in+ v in v ref ad7933/ AD7934 0.47 f 03713- 0- 035 3.75v 2.5v 1.25v 3.75v 2.5v 1.25v f i gure 29. input common-m ode r a ng e vs . v ref (2 v ref ra ng e , v dd = 5 v ) driving differential inputs dif f er en t i al op e r a t io n r e q u ir es t h a t v in + an d v in ? be sim u l t an eo us l y dr i v en wi t h tw o eq ual sig n als tha t a r e 180 o u t o f phas e . th e comm on m o de m u s t b e s et u p exter nal l y a n d ha v e a ran g e tha t is det e r m in e d b y v ref , t h e p o w e r s u p p l y , a n d t h e p a r t ic u l a r am plif ier us e d t o dr i v e t h e a n a l og in p u ts. dif f er en t i al m o des o f o p era t ion w i t h ei t h er an ac o r dc in p u t p r o v ide t h e b e s t thd p e r f o r ma n c e o v er a wide f r e q uen c y ra n g e . s i n c e n o t all a p p l i c a t i o n s h a v e a s i g n al p r eco n d i ti o n ed f o r dif f er en t i al op er a t io n, t h er e is o f t e n a ne e d t o p e r f o r m sin g le- en ded-t o -di f f e r e n t i a l co n v er si o n . 2 v ref p-p g nd 390 ( 220 ( 220 ( 220 ( 20k ( 220 ( 10k ( 27 ( 27 ( v+ v v+ v a v in+ v in v ref ad7933/ AD7934 0.47 f 03713- 0- 036 3.75v 2.5v 1.25v 3.75v 2.5v 1.25v rev. pr page 21 of 32
ad7933/AD7934 prelim inary technical data power on write to the control register to set up operating mode, analog input and output configuration set seq0 = seq1 = 0. select the desired channel to convert on (add1 to add0). issue convst pulse to initiate a conversion on the selected channel. initiate a read cycle to read the data from the selected channel. initiate a write cycle to select the next channel to be converted on by changing the values of bits add2 to add0 in the control register. seq0 = seq1 = 0. 03713-0-038 pseudo -differential mode the ad7933/AD7934 can ha ve tw o ps eudo-dif f e r e n t ial p a irs b y s e t t in g b i ts m o d e 0 a nd m o d e 1 in t h e co n t r o l r e g i s t er t o 1, 0, r e s p ecti v e l y . v in + i s co n n ec t e d t o th e s i gn al so ur ce th a t m u s t ha v e an am pli t u d e o f v ref t o mak e us e o f t h e f u l l d y na mic ran g e o f t h e p a r t . ad c in p u t is a p pli e d t o t h e v in ? p i n. th e v o l t a g e a p pl i e d to t h i s i n put prov i d e s a n of f s e t f rom g rou nd or a p s e u d o g rou nd f o r t h e v in + in p u t. the b e n e f i t o f ps eu do-dif fer e n t ial in p u ts is t h a t t h e y s e p a ra te t h e a n alog in p u t sig n al g r o u n d f r om th e a d c s gr o u n d allo w i n g d c co mm o n -m od e v o l t a g e s t o be c a nc el l e d. f i g u re 3 2 show s a c o n n e c t i on d i ag r a m f o r t h e ps eudo-dif fer e n t ia l m o d e . v in+ v in v ref ad7933/ AD7934 additional pins omitted for clarity 03713-0-037 v ref p-p 0.47 f dc input voltage range ) 100mv f i g u re 32. p s eud o -d if f e r e nt ia l m o de conne c t io n d i ag r a m analog input selection a s sh o w n i n , us ers ca n s et u p t h eir a n al og in p u t co nf igura t io n b y s e t t in g t h e va lues in bi ts mod e 0 a nd mo d e 1 in t h e con t r o l r e g i st er . a s sumi ng t h e conf igura t io n is ch os en, t h er e a r e tw o di f f er en t wa ys o f s e le c t in g t h e ana l og in p u t t o b e co n v er t e d dep e n d in g on t h e s t a t e o f t h e s e q0 and s e q1 b i ts i n t h e c o n t ro l re g i ste r . t a b l e 9 t a b l e 9 normal multi c hann el operation (seq0 = s e q1 = 0) a n y on e of f o u r an a l o g i n put ch an n e l s or t w o p a i r s of ch an n e l s ma y b e s e le c t e d fo r co n v ersio n in an y o r d er b y s e t t i n g t h e s e q 0 a nd s e q1 b i t s i n t h e co n t r o l r e g i s t er b o t h t o 0. the cha n ne l t o be co n v er t e d is s e lec t e d b y wr i t in g t o b i ts ad d1 a nd add0 in th e co n t r o l r e gis t er t o p r ogra m th e m u l t i p lex e r p r io r t o th e c o n v e r s i on . t h i s mo d e of op e r at i o n i s of a nor m a l m u lt i c h a n n el ad c w h er e e a ch da t a wr i t e s e le c t s t h e n e xt channe l fo r c o n v e r s i on . f show s a f l ow ch ar t of t h is mo d e of o p era t ion. th e cha n n e l co nf igu r a t io n s a r e sh ow n in . i g u re 3 3 f i g u re 33. no r m a l m u lt ic hann el o p er at io n f l o w c h a r t using the se q u en ce r: conse c uti v e se qu en ce (seq0 = 1, seq1 = 1) a s e q u en ce o f c o n s ec u t i v e c h a n n e ls ca n be co n v er t e d b e g i nning wi t h chann e l 0 a nd en din g wi t h a f i nal c h ann e l s e lec t e d b y wr i t i n g t o b i ts ad d1 an d add0 in t h e con t rol r e g i s t er . this is do ne b y s e t t in g t h e s e q0 and seq1 b i t s in t h e co n t r o l r e g i ster b o t h t o 1. on ce t h e con t r o l r e g i s t er is wr i t t e n t o s et t h is m o de u p , t h e n e xt con v ersio n is o n c h a n n e l 0, t h en c h a n n e l 1, and s o o n un til t h e channe l s e lec t ed b y th e addr es s b i t s , ad d1 an d ad d0, is r e ache d . th e ad c t h en r e t u r n s t o c h a n n e l 0 and st ar t s t h e s e qu e n c e ag ai n . t h e wr i n put m u s t b e ke pt h i g h to en s u r e t h a t t h e co n t r o l r e g i s t er is n o t accide n t a l ly o v e r wr i t t e n a nd t h e s e q u enc e in ter r u p t e d . this p a t t e r n co n t in ues un t i l s u ch time as t h e ad7 933/AD7934 is wr i t t e n t o . f s h o w s t h e f l o w cha r t o f t h e co n s e c u t i v e s e q u en c e m o de . i gur e 3 4 f i gure 34. cons ecu tive s e qu ence m o d e f l o w ch a r t power on write to the control register to set up operating mode, analog input and output configuration select final channel (add1 and add0) in consecutive sequence. set seq0 = 1 seq1 = 1. continuously convert on a consecutive sequence of channels from channel 0 up to and including the previously selected final channel on add1 and add0 with each convst pulse. 03713-0-039 reference section the a d 79 33 /a d79 34 c a n op er a t e w i t h ei t h er t h e on-chi p r e fer e nc e o r an e x t e r n al refere nc e . the i n ter na l refer e nc e i s s e le ct ed b y s e t t i n g th e r e f b i t i n th e i n t e rn a l c o n t r o l r e g i s t e r t o 1 . a bl o c k d i ag r a m of t h e i n t e r n a l re f e re n c e c i rc u i t r y i s s h o w n i n f i g u r e 35. the i n t e r n al refere n c e c i r c u i t r y i n cl u d es an on- c hi p 2.5 v b a nd g a p refer e nc e and a refer e nc e b u f f er . w h en usi n g t h e i n ter na l r e fer e nc e , t h e v re f i n /v ref o ut p i n sh o u ld b e de co u p le d t o a g nd wi t h a 0. 47 f c a p a c i t o r . this in t e r n al refer e nce n o t onl y p r o v ides t h e r e fe r e n c e fo r t h e a n alog -t o - di g i t a l c o n v ersion, b u t i t also i s use d e x t e rn all y in t h e s y s t e m . i t is r e co mm en d e d tha t t h e r e fer e nc e out p ut is b u f f er e d usi n g an ex t e r n al p r e c is ion o p am p b e fo re a p p l y i n g i t an y w here in t h e syst e m . rev. pr g page 22 of 32
prelim inary technical data ad7933/AD7934 reference ad7933/ AD7934 adc buffer 03713-0-040 v refin / v refout ex a m p l e 2 v in ma x v dd + 3 v in ma x v ref + v ref 2 if v dd 36 v t en v in ma x 3 v f i gure 35. inte rn al r e fer e n c e c i rcuit bl ock d i agr a m ther efo r e , 3 v ref 2 36 v a l te r n a t i el an e te r n a l re fe ren e a n e a l i e to t e v refin v ref t i n o f t e ad33ad34 an et e r n al r e fer e n e i n t is s e le t e s e t t in g t e ref i t in t e i n t e r n al o n t ro l re g i ste r to e n s i n g an e te r n a l re f e re n e t e v refin v ref t i n s o l e e o le to a nd i t a 1 f a a i t o r en o era t i n g in if f er en t i al o e t e et e r n al r e f e r e n e in t ra n g e is 1 v t o 35v a n in sing le-en e an s eo-if fer e n t ial o e t e et e r n al r e fer e n e in t ra n g e is 1 v t o v dd i n a l l as e s t e s e if ie r e fer e n e is 25 v v ref ma x 26 v ter efo r e e n o era t in g i t a t v dd 3 v t e a l e o f v ref a n ran g e f r o 1 v t o a ai a l e o f 24 v en v dd 2 v v re f ma x 2 v t e s e ea les s o t a t t e ai r e fer e n e a li e t o t e ad33 ad34 is ir e t l e e na n t o n t e a l e a l ie to v dd i t is i o r t an t to en s r e t a t e n o o sin g t e r e fer e n e al e t e ai analog in t ra n g e v in ma x is n e e r gr ea t e r t a n v dd + 3 v t o o l i t t e ai ra tings o f t e e i e i n s eo if f er en t i al o e t e s er s t ens r e t a t v refin v in v dd te e r f o r a ne o f t e a r t a t if f er en t r e fer e n e a l es is s on i n f i gr e s td t o t d te al e o f t e r e fer e n e s ets t e a n alog in t s a n an t e o on- o e o l t a g e ra n g e e r ror s i n t e re f e re n e s o r e re s lt i n g a i n e r ror s i n t e ad33ad 34 tra n sf er f n tio n an a t o t e s eif ie f l l -s ale er r o r s o n t e a r t l i s t s s i t a le o l t a g e re f e re n e s a a i l a l e f ro a d i t a t o l e s e an f s o s a t i a l o nne t io n i a g r a fo r a n e ter n a l r e fer e n e t a l e 1 1 tale 11 e a les of sit ale voltage re fere nes te fol l o in g t o ea les al l a t e t e ai v ref in t ta t a n e s e en o era t ing t e ad33 ad34 in if f er en t i al o e i t a v dd o f 5 v a n 3 v r e s e ti e l i g re 3 6 f i g u re 36. t y pic a l v ref c o nnec t ion p r ogr a m ex a m p l e 1 reference ou tpu t voltage initial accu racy ( max) operating current (a) ad780 2.5/3 0.04 1000 a d r 4 2 1 2 . 5 0 . 0 4 5 0 0 a d r 4 2 0 2 . 0 4 8 0 . 0 5 5 0 0 v in ma x v dd + 3 v in ma x v ref + v ref 2 313--41 1 ad n 2 +v in n 3 nd 6 4 temp 5 pseet trim v t v ref 25v n n v dd n n nnet 1nf 1 f 1 f 1 f additina pins mitted fr arit ad33 ad34 if v dd 5 v t en v in ma x 53 v ter efo r e 3 v ref 2 53 v v ref ma x 35 v ter efo r e e n o era t in g a t v dd 5 v t e ale o f v ref a n ra n g e f r o 1 v t o a ai al e o f 35 v en v dd 45 v v ref ma x 31 v rev. pr g | page 23 of 32
ad7933/AD7934 prelim inary technical data digital inputs parallel interf ace the dig i tal in p u ts a p p l ie d t o t h e ad7933/ad79 34 a r e n o t limi te d b y t h e maxim u m ra t i ngs t h a t limi t t h e a n alog in p u ts. i n s t e a d , t h e dig i t a l in pu ts a p plie d can g o t o 7 v a nd a r e n o t r e s t ri ct ed b y th e a v dd + 0.3 v limi t t h a t is on t h e a n alog in p u ts. the ad7933/AD7934 ha v e a f l exi b l e , hig h s p e e d , p a ral l e l in t e r f ace . this in t e r f ace is 12-b i t s (AD7934) o r 10-b i ts (ad7933) wide a nd is c a p a b l e of o p era t in g in ei th er w o r d ( w / b ti ed h i gh ) o r b y t e (w/ b ti ed lo w ) m o de . th e co n v s t sig n al is us e d t o in i t ia t e co n v ersio n s, and w h e n o p er a t i n g in a u t o s h u t do wn o r a u t o s t and b y m o de , i t is us ed t o p o w e r u p th e ad c. a n o t h e r a d v a n t a g e o f th e d i g i ta l i n p u t s n o t b e i n g r e s t ri ct ed b y th e a v dd + 0. 3 v li m i t i s th e f a ct th a t po w e r s u p p l y seq u e n c i n g iss u es a r e a v o i de d . i f an y o f t h es e i n pu t s a r e a ppli e d b e fo r e a v dd , t h e n t h ere i s n o r i s k o f l a t c h-u p as t h ere w o u l d b e on t h e analo g i n pu t s if a s i g n a l g r e a ter t h an 0 . 3 v wa s a ppl i e d pr ior to a v dd . a fa l l in g e d ge on t h e co n v s t sig n al is u s ed t o ini t ia t e co n v ersio n s, and i t als o p u ts t h e ad c t r ack- and- h o ld i n t o t r ack. on ce t h e co n v s t sig n al g o es lo w , th e b u s y sig n al go es hig h fo r t h e d u ra t i o n o f t h e con v ersio n . i n b e tw e e n co n v ersio n s, co n v s t m u st b e brou g h t h i g h f o r a m i n i m u m t i me of t 1 . t h i s m u s t ha p p e n a f ter t h e 14 th r i sing edg e o f clki n o t h e r w is e , t h e co n v ersio n wi l l b e ab o r te d an d t h e t r ack-and- hold wi l l go b a ck in t o t r ack. a t t h e end o f t h e con v ersio n , b u s y go es lo w a n d can b e u s e d to ac t i v a te an i n te r r upt s e r v i c e rout i ne. the cs and rd lin e s a r e t h en ac ti va t e d in p a ral l e l t o r e ad t h e 12 b i t s o r 10 b i ts o f co n v ersio n da t a . w h en p o w e r s u p p lies a r e f i rs t a p pli e d t o t h e de vice, a r i sin g e d ge o n co n v s t p u ts t h e t r ack-and- h o l d in t o trac k. th e ac q u isi t io n time o f 135 n s minim u m m u s t be al lo w e d b e f ore co n v s t is b r o u g h t lo w t o ini t i a te a con v ersio n . the a d c w i ll t h en g o i n t o h o ld o n th e fallin g ed g e o f co n v s t and ba c k in t o tra c k o n th e 13 th r i sing edg e o f clki n a f t e r this (s e e ) . w h e n op e r at i n g t h e d e v i c e i n a u to s h utd o w n or a u t o s t and b y m o de , w h er e t h e a d c p o w e rs do wn a t t h e e nd o f e a ch co n v ersio n , a r i sin g e d ge o n t h e co n v s t sig n al is us ed to po w e r u p th e dev i c e . v drive input the ad7933/AD7934 has a v dr i v e fe a t ur e v dr iv e co n t r o ls th e v o l t a g e a t w h ich t h e p a ral l e l i n t e r f ace o p era t es v dr iv e allo w s th e ad c t o easil y in t e r f ace t o 18 v , 3 v , a n d 5 v p r o c es s o rs v dr iv e o f 18 v ca n o n ly be us ed if v dd = 27 v t o 36 v f o r exa m p l e , if th e ad7933 /AD7934 o p era t e d wi t h an a v dd of 5 v a nd t h e v dr i v e p i n co u l d b e p o w e r e d f r o m a 3 v su p p ly , t h e ad7933/ad79 34 has bet ter d y na mic p e r f o r ma n c e wi th an av dd of 5 v w h i l e st i l l b e i n g ab l e to i n te r f ac e to 3 v pro c e s s o rs c a re shou l d b e t a e n to e n su re v dr iv e do es n o t exce e d a v dd by m o r e than 03 v (s ee ) t a b l e 4 f i g u re 3 7 f i gur e 3 7 . ad79 33 /ad7 93 4 p a r a l l e l inte r f a c e co n v e r s i on a n d re a d c y c l e in w o r d m o de ( w / b = 1) t 2 t 3 t 20 t 14 t 11 t 9 t 13 t 12 t 10 t convert t auisition t uiet t 1 12 3 4 5 1 2 1 3 1 4 b a data data old data db0 to db11 db0 to db11 rd cs internal trac/hold bus clin convst three-state three-state 03713-0-004 with cs and rd tied low rev. pr page 24 of 32
ad7933/AD7934 prelim inary technical data reading data from the a d 7 933/AD7934 w i th th e w / b p i n tie d log i c hig h , th e ad7933 /AD7934 in t e r f ace op era tes in w o r d m o de . i n t h is c a s e , a sin g le r e ad o p era t ion f r o m t h e de vice access es t h e con v ersio n da t a -w o r d on p i n s d b 0/d b 2 to d b 11. th e db8/hb e n p i n as s u m e s i t s d b 8 fu n c t i o n . w i th th e w / b p i n tied t o logi c l o w , th e ad7933/ad79 34 in t e r f ace op era t es in b y t e m o de . i n this cas e , t h e d b 8/ hb e n p i n as s u m e s i t s hb en f u n c t i on. c o n v ersio n da ta f r o m t h e ad7933/ ad793 4 m u s t be access ed in tw o r e ad o p e r a t i o n s wi th 8 b i t s o f da ta p r o v i d ed o n d b 0 t o d b 7 f o r ea c h o f t h e r e ad o p era t io n s . the hben p i n det e r m i n es w h et her t h e r e ad o p era t io n acces s es t h e hig h b y t e o r t h e lo w b y t e o f t h e12- or 1 0 - bit word. f o r a l o w by te r e a d , db 0 to db 7 prov i d e t h e eig h t l s bs o f t h e 12-b i t w o rd . f o r 10-b i t o p era t io n, t h e tw o l s b s of t h e l o w by t e a r e 0 s a n d a r e f o l l ow e d by 6 bit s of c o n v e r s i on d a t a . f o r a h i g h by te re a d , db 0 to db 3 prov i d e t h e 4 ms bs o f th e 1 2 -/10-b i t w o r d . d b 4 o f th e hig h b y t e is al wa ys 0 a nd db5 and db6 o f t h e hig h b y te p r o v ide t h e c h a n n e l id . s h o w s th e r e ad c y c l e timin g dia g ram f o r a 12-/10-b i t t r a n sfer . w h en o p era t e d i n w o rd m o de , t h e h b en in p u t do e s n o t exis t an d on ly t h e f i rs t r e ad o p era t ion is r e quir e d t o acces s d a t a f rom t h e d e v i c e . whe n op e r a t e d i n by te m o d e , t h e t w o re a d c y cl e s show n i n f are re qu i r e d to a c c e ss t h e f u l l d a t a - word f rom t h e d e v i c e . f i gur e 3 7 i g u re 3 8 f i gur e 3 8 . ad79 33 /ad7 93 4 p a r a l l e l inte r f a c erea d c y c l e ti mi ng for byte m o de ope r a t i o n ( w / b = 0) the cs and rd sig n a l s a r e ga te d i n ter n a l ly a n d l e vel t r ig ger e d ac ti v e lo w . i n ei t h er w o r d m o de o r b y t e m o de , cs a nd rd ma y be tied t o g e t h e r a s th e t i m i n g s p eci f i c a t i o n t 10 and t 11 is 0 n s m i n i m u m . t h e da ta i s pla c e d o n t o th e d a t a b u s a tim e t 13 af te r bo th cs a nd rd g o lo w . th e rd r i sin g edg e can be us e d t o la t c h da ta o u t o f th e d e v i ce . a f t e r a tim e , t 14 , t h e d a t a l i n e s w i l l beco m e th r e e - s t a t e d . a l te r n a t iv ely , cs a nd rd ca n be ti e d pe rm a n en tl y lo w a n d t h e c o n v e r s i o n d a ta w i ll b e v a l i d a n d p l a c ed o n t o th e d a t a b u s a ti m e , t 9 , befo r e t h e fal l in g e d ge o f b u s y . t 11 t 10 t 13 t 15 t 15 t 16 t 16 t 14 t 12 t 17 low byte high byte db0 to db7 hben/db8 rd cs 03713-0-005 rev. pr g page 25 of 32
ad7933/AD7934 prelim inary technical data writing data to the a d 7933/AD7934 wi t h w / b t i e d log i c hig h , a sing le wr i te o p er a t ion t r a n sfers t h e f u l l d a t a - w ord o n db 0 to db 1 1 to t h e c o n t ro l re g i ste r on t h e ad7933/ad79 34. th e d b 8 / hb en p i n as s u mes i t s d b 8 f u n c tion. da t a wr i t t e n t o the ad7933/AD7934 s h o u ld be p r o v i d ed o n t h e d b 0 t o d b 11 i n p u t s wi th d b 0 be in g th e l s b o f th e da ta- w o r d . w i t h w/ b tied log i c lo w , th e ad7933/AD7934 r e q u ir es tw o wr i t e o p era t ion s to t r a n sfer a f u l l 12-b i t w o r d . d b 8/hb e n assum e s i t s h b en f u n c t i on. da t a wr i t t e n t o t h e ad7933/ad79 34 s h o u ld be p r o v ided on t h e db0 t o d b 7 in p u ts. hb e n det e r m i n es w h et h e r t h e b y t e wr i t t e n is hig h b y t e o r lo w b y te da t a . th e lo w b y te of t h e da t a -w o r d has db0 b e in g th e ls b o f th e f u ll d a ta -w o r d . f o r th e h i g h b y t e w r i t e , hb en s h o u ld b e hig h a nd t h e da t a on t h e d b 0 i n p u t sh o u ld b e da t a b i t 8 o f th e 12 b i t wo r d . f i gur e 3 9 f i g u re 39. a d 7 9 3 3 / a d79 3 4 p a r a lle l i n t e r f ace w r it e c y c l e tim i ng f o r w o r d m o de o p er at io n ( w / b = 1) s h o w s t h e wr i t e c y cle t i min g dia g ram o f t h e ad7933/ad79 34. w h en o p er a t ed in w o r d mo de , th e hb e n in p u t do es n o t e x is t a nd o n ly t h e o n e wr i t e o p er a t io n is r e q u ir e d to w r ite t h e word of d a t a to t h e d e v i c e . d a t a s h ou l d b e prov i d e d o n d b 0 t o d b 1 1 . w h e n o p er a t e d i n b y t e m o de, t h e tw o wr i te c y cles s h o w n i n f a r e r e q u ir e d t o wr i t e t h e f u l l da t a - w o r d t o the ad7933/AD7934. i n f , th e f i rs t wr i te tra n s f e r s th e lo w e r 8 b i t s o f th e da ta- w o r d f r o m d b 0 t o d b 7 a nd t h e s e cond wr i t e t r an sfers t h e up p e r 4 b i ts o f t h e da t a -w o r d . i gur e 4 0 i gur e 4 0 f i g u re 40. a d 7 9 3 3 / a d79 3 4 p a r a lle l i n t e r f ace w r it e c y c l e tim i ng f o r b y t e m o de o p er at io n ( w / b = 0) w h en wr i t in g to th e ad7933/AD7934, the t o p 4 b i t s in t h e hig h b y t e m u s t be 0s. the da t a is l a t c h e d in t o the device o n t h e r i sin g edg e o f wr . t h e d a t a n eeds t o be set u p a tim e , t 7 , b e f ore t h e wr ri s i n g ed g e a nd h e ld fo r a t i m e , t 8 , a f ter t h e wr ri s i n g ed g e . th e cs a nd wr sig n als a r e ga t e d in t e r n al l y . cs a nd wr m a y be ti e d t o g e th e r a s th e tim i n g s p ecif i c a t i o n f o r t 4 a nd t 5 is 0 n s m i ni m u m ( a ssumi ng cs a nd rd h a v e n o t alr e a d y been ti e d t o g e th e r ). t 8 t 5 t 7 t 6 t 4 data db0 to db11 wr cs 03713-0-002 t 5 t 4 t 7 t 18 t 18 t 19 t 19 t 8 t 6 t 17 low byte high byte db0 to db7 hben/db8 wr cs 03713-0-003 rev. pr g page 26 of 32
prelim inary technical data ad7933/AD7934 power modes of operation the ad7933/AD7934 ha v e f o u r dif f er en t p o w e r m o des o f o p era t ion. th es e m o des a r e des i g n e d t o p r o v ide f l exi b le p o w e r m a n a ge me n t opt i ons . d i f f e r e n t opt i ons c a n b e c h o s e n to o p tim i ze t h e po w e r d i s s i p a t io n/th r o u gh p u t ra t e ra tio f o r dif f er in g a p plic a t io n s . the m o d e o f o p era t io n is s e le c t e d b y t h e p o w e r ma na ge m e n t b i t s, pm1 a nd pm0, in t h e co n t r o l r e g i ster , as det a i l e d i n . w h en p o w e r is f i rs t a p pli e d t o t h e ad7933/ad79 34 a n o n -c hi p , p o w e r - o n r e s et cir c ui t en s u r e s the defa u l t p o w e r - up co n d i t ion is no r m a l m o d e . t a b l e 8 n o te t h a t , a f ter p o w e r - o n , t r ack - an d - h o l d is in h o ld m o d e an d t h e f i rs t r i sin g e d g e o f co n v s t places t h e t r ack-and- h o l d in to tra c k m o d e . normal mode (pm1 = pm0 = 0) this m o de is in t e nde d fo r t h e f a s t est t h r o u g h pu t ra t e p e r f o r ma n c e b e ca us e t h e us er do es n o t ha v e t o w o r r y a b o u t a n y p o w e r - u p tim e s bec a us e t h e ad7933/AD7934 rema in f u l l y p o w e r e d u p a t a l l tim e s. a t p o w e r - o n r e s e t, this m o de is t h e defa u l t s e t t in g i n t h e co n t r o l r e g i s t er . auto shutdow n (pm1 = 0; p m 0 = 1) i n this m o de o f o p era t ion, th e ad7933/AD7934 a u t o ma tical l y en t e r f u l l s h u t do wn a t t h e e n d o f e a ch co n v ersio n , w h ich is sh own a t p o i n t a i n . i n sh u t do w n m o de, a l l in ter na l c i rc u i t r y on t h e d e v i c e i s p o we re d. t h e p a r t re t a i n s i n f o r m a t i o n i n t h e c o n t ro l re g i ste r d u r i ng s h utd o w n . i t re m a i n s i n sh utd o w n mo d e u n t i l t h e ne x t r i s i ng e d g e of co n v s t (see p o in t b in ) . i n o r d er t o k e ep t h e de vice in sh u t do wn f o r as lo n g as p o ssib le, co n v s t s h ou ld idle lo w betw een con v ersion s as s h o w n i n . on this r i sin g edg e , t h e p a r t b e g i n s t o p o w e r - u p an d t r ack-and- h o ld ret u r n s to t r ack m o d e . t h e p o w e r - u p t i m e r e q u ir e d de p e nds o n w h et h e r t h e us er is op e r a t i n g w i t h t h e i n te r n a l or e x te r n a l re f e re nc e. w i t h t h e in t e r n al r e f e r e nce , th e p o w e r - u p time is typ i cal l y tb d , an d wi t h a n ext e r n al r e fer e n c e , t h e p o w e r - u p t i m e is typ i cal l y tb d . the us er s h o u ld ensur e t h a t t h e p o w e r - u p t i me has e l a p s e d b e fo r e ini t i a t i n g a con v ersio n . f i gur e 3 7 f i gur e 3 7 f i gur e 4 1 f i g u r e 4 1 f i gure 4 1 . a u to -shut d o w n/ a u to -standb y mo de auto standby (pm1 = 1 pm0 = 0) i n this m o de o f o p era t ion, th e ad7933/AD7934 a u t o ma tical l y en t e r s t an d b y mo de a t t h e e n d of e a ch co n v ersio n . w h en t h is m o de is en t e r e d, al l cir c ui tr y o n th e ad7933/AD7934 is p o we re d d o w n e x c e pt f o r t h e re f e re nc e a n d re f e re nc e bu f f e r . also , tra c k - a n d-h o ld g o e s in t o h o ld a t th i s po i n t a n d r e m a in s i n h o ld as lo ng as t h e de vice is in sta n d b y the p a r t r e ma in s in st a n db y u n t i l t h e ne x t r i s i ng e d ge of co n v s t p o w e r s u p th e de vice , w h ich t a k e s a t le ast tb d . th e us er sh o u l d en s u r e t h is p o we r - up t i me h a s el a p s e d b e f ore i n it i a t i ng a n ot he r c o n v e r s i on , as sh o w n i n . this r i sin g edg e o f conv s t als o p l ac es t r ack-and- h o ld b a ck i n to t r ack m o d e . full shutdow n mode (pm1 = 1; pm0 = 1) w h e n t h i s mo d e i s e n te re d, a l l c i rc u i t r y on t h e ad7933/ad79 34 is p o w e r e d do wn u p on com p letio n o f th e wr i t e op era t io n, i . e . , o n r i sin g e d g e o f wr . the p a r t r e t a in s t h e info r m a t io n i n t h e con t r o l r e g i st er w h i l e t h e p a r t is in s h u t do wn. th e ad7933/ad79 34 r e ma in in f u l l s h u t do wn m o d e , an d t r ack - an d - h o l d in h o ld m o de, un t i l t h e p o w e r ma na g e m e n t b i ts (pm1 a nd p m 0) in t h e co n t r o l r e g i s t er a r e cha n g e d . i f a wr i t e t o t h e con t r o l r e g i s t er o c c u rs w h i l e t h e p a r t is in f u l l sh u t do w n m o de, and t h e p o w e r ma nagem e n t b i ts a r e c h a n g e d t o pm 0 = pm1 = 0, i . e . , n o r m al mo de , th e p a r t b e g i n s t o p o w e r u p o n th e wr r i sin g e d ge a nd t h e t r ack and h o l d re tu r n s to t r a c k . . t o e n su re t h e p a r t i s f u l l y p o we re d up b e f ore a co n v ersio n is ini t i a te d , t h e p o wer - u p t i m e , tbd , s h o u ld b e a l l o we d b e f ore t h e co n v s t fal l in g e d ge; o t h e r w is e , in val i d da ta i s r e ad . t power-up 1 1 14 14 busy clkin convst 03713-0-048 a b rev. pr g page 27 of 32
ad7933/AD7934 prelim inary technical data power vs. throughput rate a b i g ad van t a g e o f p o w e r i n g t h e ad c do w n a f t e r a con v ersio n is t h a t t h e p o w e r co n s um p t ion o f t h e p a r t is sig n if ican t l y r e d u ce d a t lo w e r t h r o u g h p u t ra t e s. w h e n usin g t h e dif f er en t p o w e r m o des, t h e ad7933 /AD7934 is o n l y p o w e r e d u p f o r the d u ra t i on o f t h e co n v ersio n . the r efo r e , t h e a v erag e p o w e r co n s um p t io n p e r c y cle is sig n if ica n t l y r e d u c e d . f a nd show pl ot s of t h e p o w e r ve r s u s t h e t h rou g h put w h e n o p e r at i n g i n au t o s h u t d o w n a n d au t o s t a n d b y m o d e s . i gur e 4 2 f i gure 42. p o wer vs. throu g hput in au to s h utd o wn m o de f i g u re 4 3 f i gure 43. p o wer v s . thro ughput in au to st andby mod e microprocessor interfacing ad7933/AD7934 to adsp-2 1xx interface f i gur e 4 4 f i g u re 44. inte r f a c i n g to t h e a d s p - 21x x s h o w s th e ad7933/AD7934 in ter face d t o the ads p - 21xx s e r i es o f d s p s as a m e m o r y ma p p e d de vic e . a sin g le wa i t s t a t e ma y be ne ces s a r y t o in t e r f ace the ad7933 /AD7934 t o t h e ads p -21x x , dep e ndi n g o n t h e clo c k sp e e d o f t h e ds p . t h e wa i t s t a t e c a n b e p r og r a m m ed v i a th e d a ta m e m o r y w a i t s t a t e c o n t ro l re g i ste r of t h e a d sp - 2 1 x x ( s e e t h e a d sp - 2 1 x x f a m i ly u s e r s m a n u a l f o r d e t a i l s ) . t h e f o l l ow i n g i n st r u c t i o n re a d s f rom th e ad7933 /AD7934: mr = d m (ad c ) wher e ad c is th e addr es s o f the ad7933 /ad7 934. ad7933/ AD7934 adsp-21xx wr rd db0 to db11 d0 to d23 a0 to a15 dms ir q2 busy cs convst optional wr rd additional pins omitted for clarity address bus data bus address decoder 03713-0-044 ad7933/AD7934 to adsp-2 1065l interface f i gur e 4 5 f i gure 4 5 . int e r f acing t o th e ads p - 2 10 65 l s h o w s a typ i cal i n t e r f ace b e tw e e n t h e ad7933/ad79 34 a nd t h e ads p -21065l s h ar c p r o c es s o r . this i n t e r f ace is a n exa m ple o f o n e o f t h r e e d m a han d s h a k e mo d e s . t h e ms x co n t r o l line is ac t u al l y thr e e m e mo r y s e lec t l i ne s . in te r n a l a ddr 25C24 a r e de co de d in to ms 3-0 , th ese lin e s a r e th en as s e r t e d as c h i p s e lec t s. the dm a r 1 (d ma r e q u est 1) is us e d in t h is s e t u p as t h e in t e r r u p t t o sig n al t h e end o f t h e co n v ersio n . the r e s t o f t h e i n t e r f ace is s t anda rd ha n d s h aki n g op e r a t i o n . ad7933/ AD7934 adsp-21065l wr db0 to db11 d0 to d31 addr 0 to addr 23 ms x dm ar 1 busy cs convst optional wr rd rd additional pins omitted for clarit y address bus address bus data bus address latch address decoder 03713-0-045 rev. pr g page 28 of 32
prelim inary technical data ad7933/AD7934 ad7933/AD7934 to tms32020, tms320c 25, and tms320c5x interface p a ral l e l in t e r f ac es betw een t h e ad7933/ad79 34 a nd t h e t m s32020, t m s320c25 a nd tms320c5x fa mil y o f ds p s a r e s h o w n i n . th e m e m o r y ma p p e d addr es s c h os en f o r th e ad7933 /AD7934 sh o u ld b e c h os en t o fal l in the i/o m e m o r y s p ace o f t h e dsp s . the p a ral l e l in ter face o n t h e ad7933/ad79 34 is fas t en o u g h t o in t e r f ace t o th e t m s32020 wi t h n o extra wa i t sta t es. i f hig h s p e e d g l ue log i c, s u c h as 74 a s de vices, a r e us e d t o dr i v e t h e rd a nd t h e wr lin e s w h en in t e r f acing t o the t m s320c25, t h en a g a i n, n o wa i t sta t es a r e n e ces s a r y . h o w e v e r , if s l o w er log i c is us ed , da t a acces s es ma y b e sl owe d su f f i c i e n t l y w h e n re a d i n g f rom an d w r it i n g to t h e p a r t t o r e q u ir e t h e in s e r t io n o f o n e wai t s t a t e . e x t r a wai t s t a t es wi l l b e n e ces s a r y wh en usin g th e t m s 320c5x a t t h eir fas t est c l o c k s p eeds (s ee t h e t m s320c5x u s er s g u ide f o r deta ils). f i gur e 4 6 f i gur e 4 6 . int e r f ac ing t o the tms3 2020 / c 2 5 / c 5 x d a t a is r e ad f r o m t h e a d c usi n g t h e fol l o w ing in st r u c t io n: in d , ad c w h er e d is t h e da t a m e m o r y addr es s, an d ad c is t h e ad7933/ad79 34 addr es s. ad7933/ AD7934 tms32020/ tms320c25/ tms320c50 wr rd db11 to db0 dmd0 to dmd15 a0 to a15 is ready in t x busy cs en convst optional tms320c25 only r/w strb additional pins omitted for clarity address bus data bus address decoder 03713-0-046 msc ad7933/AD7934 to 80c18 6 interface f i gur e 47 s h o w s th e ad7933/AD7934 in ter face d t o the 80c186 micr o p r o ces s o r . the 80c186 d m a co n t r o l l er p r o v ides tw o indep e n d en t hi g h s p e e d d m a cha n n e ls w h er e da t a t r an sfer can occur be tw een m e m o r y a n d i/o s p a c e s . e a c h da ta tra n s f e r co n s u m es t w o b u s c y cles , o n e c y cle t o fet c h da t a a nd t h e o t h e r t o s t o r e da t a . af t e r th e ad7933 /AD7934 has f i nis h e d a co n v ersio n , t h e b u s y li n e g e n e ra t e s a d m a r e q u es t t o c h a n n e l 1 (d rq1). a s a r e s u l t o f t h e in t e r r u p t, t h e p r o c ess o r p e r f o r m s a d m a read op era t io n w h ich als o r e s ets t h e in t e r r u p t l a t c h. s u f f i cien t p r io r i ty m u s t b e as sig n e d t o t h e d m a ch an nel to e n su re t h a t t h e dm a re qu e s t w i l l b e s e r v i c e d b e f ore th e co m p le ti o n o f th e n e xt co n v e r s i o n . ad7933/ AD7934 80c186 wr db0 to db11 ad0 to ad15 a16 to a19 ale drq 1 busy cs qr s convst optional wr rd rd additional pins omitted for clarit y address/data bus address bus data bus address latch address decoder 03713- 0- 047 f i g u re 47. inte r f a c i n g to t h e 80c 18 6 rev. pr g page 29 of 32
ad7933/AD7934 prelim inary technical data appli c ation hints grounding and layout the r in ted cir c ui t a r d tha t h us es th e ad79 33/AD7934 sh u ld e desi n e d s t h a t t h e a n a l a nd di i t a l s e c t i n s a r e s e a r a te d and c n in e d t cer t ain a r e a s t h e a r d . this aci li t a t e s t h e us e r u n d lan es t h a t c a n e e a si ly s e a ra t e d . a minim u m et ch t e chniq u e is en e ral l y e s t r r u n d l an es as i t i e s t h e es t s h ie ldin. di i tal and a n al r u n d l an es s h u ld e in e d in n l y n e l ace , an d t h e c nn ec ti n sh u ld e a s t a r r u nd i n t est a l ish e d as cls e t t h e r u n d in s n th e ad7933 /AD7934 as s s ile . a i d r u nnin di i t a l lin e s un der t h e de ic e as t h is c u les n is e n t t h e die . th e anal ru nd l a n e s h u l d e a l l we d t r u n u n d e r t h e ad7933/ad79 34 t a i d n is e c u lin. th e w e r s u l y lin e s t t h e ad7933/AD7934 sh u ld us e as la r e a trace as s s i l e t r ide l w im e dan c e a t h s and r e d u ce t h e e e c t s l i t ch es n t h e w e r s u ly lin e . f a st s w itchin s i n a l s , su ch as c l c s , shu l d e shiel d e d wi t h d i i t a l ru n d t a i d r a d i a t i n ni s e t t he r s e c t i ns t h e a r d , an d c l c si n als sh u ld ne e r r u n n e a r t h e a n al in u ts. a id cr s s er di i t a l a nd a n a l si n a l s. t r aces n si t e sides t h e a r d sh u ld r u n a t r i h t a n l es t e a c h t he r . t h i s re d u c e s t h e e e c t s e e d t h ru h t h ru h t h e a r d . a micr s t r i t e chniq u e i s y a r t h e e s t u t is n t alwa y s s s i l e wi th a d u le - s id ed a r d . i n t h is te chni q u e , t h e cm n e n t side t h e a r d is de dic a t e d t r u n d l an e s , w h i l e si n als a r e lace d n t h e s lder side . g d dec u lin is als im r t a n t. al l a n al s u lies sh u ld e dec u led wi th 10 f tan t al um ca a c i t r s in a rall e l wi th 0.1 f ca a ci t r s t gnd . t ac hie e t h e es t r m th es e dec u lin cm n en ts, t h ey m u s t e lace d as c l s e as s s i l e t th e d e i c e . ealuating the ad7933/AD7934 performa nce the r e c mm ended l a y u t r th e ad7933 /AD7934 is u tlin e d in t h e e a l u a t i n a r d d c u men t a t i n. t h e e a l ua t i n a r d a c a e i n c l ud es a ull y a s sem led a n d t e s t ed eal ua t i n a r d , d c u m e n t a t in, a nd s t wa r e r c n t r l l in t h e a r d r m t h e p c i a t h e e al ua ti n a r d c n t r lle r . t h e e al ua ti n a r d c n t r l l er ca n e us ed in c n u n c t in wi t h the ad7933/ad79 34 eal u a tin a r d , as w e l l as ma n y t h e r adi e a l ua t i n a r ds endin in t h e cb desi n a t r , t dem n s t r a t e / e a l ua te t h e ac and dc e r r ma nce t h e ad7933/ad79 34. the s t wa r e al l ws t h e us er t e r r m ac as t f ur ier t r ans r m and d c h i s t r am c d e s te st s n t h e ad7933/ad79 34. th e s t wa r e a nd d c u m e n t a t i n a r e n t h e c d th a t s h i s wi th t h e e al ua ti n a r d . re. pr g pae 30 32
prelim inary technical data ad7933/AD7934 outline dimensions 28 15 14 1 8 0 compliant to jedec standards mo-153ae seating plane coplanarity 0.10 1.20 max 6.40 bsc 0.65 bsc pin 1 0.30 0.19 0.20 0.09 4.50 4.40 4.30 0.75 0.60 0.45 9.80 9.70 9.60 0.15 0.05 f i gure 48. 2 8 -l ead thin shr i nk s m a l l o u tline p a ckage [ t ssop ] (ru - 28) di me nsio ns sho w n i n mi ll im e t e r s ordering guide model temperature r a nge linearity error (lsb) 1 package option package descri ptions AD7934bru ?40c to +85c 1 ru-28 th in shrink small outl ine package (tssop) ad7933bru ?40c to +85c 1 ru-28 th in shrink small outl ine package (tssop) eval-AD7934c b 2 e v a l u a t i o n bo ar d eval-ad7933c b 3 e v a l u a t i o n bo ar d eval-control brd2 4 controll e r boar d 1 linearity error here re fer s to integral li nearity error. 2 this can be us ed a s a s t and a l o ne e v aluatio n bo ard o r in conjunct i o n with the e v al uatio n bo ard co ntro l le r f o r e v al ua tio n /d e m o n s tration purpose s . 3 this can be us ed a s a s t and a l o ne e v aluatio n bo ard o r in conjunct i o n with the e v al uatio n bo ard co ntro l le r f o r e v al ua tio n /d e m o n s tration purpose s . 4 e v al uation board control ler. this board is a comp l e te unit al lowing a pc to control a n d c o m m u n i ca t e wi t h a ll an a l o g d e vi ces ev a l ua t i o n boa r ds en di n g i n t h e cb designators. the fo llowing needs to b e or dered to obtain a complete evaluation kit: the adc eval uation board (eval - AD7934cb), t he eval-control brd2, and a 12 v ac transformer. see the eval-ad 7933/34cb eva l uation board techni cal note for mor e details. rev. pr g page 31 of 32
ad7933/AD7934 prelim inary technical data notes ? 2004 analo g de vices, inc. all rights reserve d . tra d em arks and registered tra d ema r ks are the prop erty of their respective owners . rev. pr g | page 32 of 32

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